Clean up APA102 config and add DD mapping (#20159)

This commit is contained in:
Ryan 2023-03-20 08:12:19 +11:00 committed by GitHub
parent 3c144fac5e
commit 65a80f411f
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
41 changed files with 106 additions and 53 deletions

View file

@ -10,6 +10,9 @@
// deprecated: Default `false`. Set to `true` to turn on warning when a value exists
// invalid: Default `false`. Set to `true` to generate errors when a value exists
// replace_with: use with a key marked deprecated or invalid to designate a replacement
"APA102_DI_PIN": {"info_key": "apa102.data_pin"},
"APA102_CI_PIN": {"info_key": "apa102.clock_pin"},
"APA102_DEFAULT_BRIGHTNESS": {"info_key": "apa102.default_brightness", "value_type": "int"},
"AUDIO_VOICES": {"info_key": "audio.voices", "value_type": "bool"},
"BACKLIGHT_BREATHING": {"info_key": "backlight.breathing", "value_type": "bool"},
"BREATHING_PERIOD": {"info_key": "backlight.breathing_period", "value_type": "int"},

View file

@ -96,6 +96,19 @@
"unknown"
]
},
"apa102": {
"type": "object",
"additionalProperties": false,
"properties": {
"data_pin": {"$ref": "qmk.definitions.v1#/mcu_pin"},
"clock_pin": {"$ref": "qmk.definitions.v1#/mcu_pin"},
"default_brightness": {
"type": "integer",
"minimum": 0,
"maximum": 31
}
}
},
"audio": {
"type": "object",
"additionalProperties": false,

View file

@ -383,9 +383,9 @@ Configure the hardware via your `config.h`:
```c
// The pin connected to the data pin of the LEDs
#define RGB_DI_PIN D7
#define APA102_DI_PIN D7
// The pin connected to the clock pin of the LEDs
#define RGB_CI_PIN D6
#define APA102_CI_PIN D6
// The number of LEDs connected
#define RGB_MATRIX_LED_COUNT 70
```

View file

@ -35,8 +35,9 @@ At minimum you must define the data pin your LED strip is connected to, and the
|Define |Description |
|---------------|---------------------------------------------------------------------------------------------------------|
|`RGB_DI_PIN` |The pin connected to the data pin of the LEDs |
|`RGB_CI_PIN` |The pin connected to the clock pin of the LEDs (APA102 only) |
|`RGB_DI_PIN` |The pin connected to the data pin of the LEDs (WS2812) |
|`APA102_DI_PIN`|The pin connected to the data pin of the LEDs (APA102) |
|`APA102_CI_PIN`|The pin connected to the clock pin of the LEDs (APA102) |
|`RGBLED_NUM` |The number of LEDs connected |
|`RGBLED_SPLIT` |(Optional) For split keyboards, the number of LEDs connected on each half directly wired to `RGB_DI_PIN` |

View file

@ -27,7 +27,7 @@
# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX) || defined(GD32VF103)
# define APA102_NOPS (100 / (1000000000L / (CPU_CLOCK / 4))) // This calculates how many loops of 4 nops to run to delay 100 ns
# else
# error("APA102_NOPS configuration required")
# error APA102_NOPS configuration required
# define APA102_NOPS 0 // this just pleases the compile so the above error is easier to spot
# endif
# endif
@ -43,14 +43,14 @@
} \
} while (0)
#define APA102_SEND_BIT(byte, bit) \
do { \
writePin(RGB_DI_PIN, (byte >> bit) & 1); \
io_wait; \
writePinHigh(RGB_CI_PIN); \
io_wait; \
writePinLow(RGB_CI_PIN); \
io_wait; \
#define APA102_SEND_BIT(byte, bit) \
do { \
writePin(APA102_DI_PIN, (byte >> bit) & 1); \
io_wait; \
writePinHigh(APA102_CI_PIN); \
io_wait; \
writePinLow(APA102_CI_PIN); \
io_wait; \
} while (0)
uint8_t apa102_led_brightness = APA102_DEFAULT_BRIGHTNESS;
@ -77,11 +77,11 @@ void rgblight_call_driver(LED_TYPE *start_led, uint8_t num_leds) {
}
void static apa102_init(void) {
setPinOutput(RGB_DI_PIN);
setPinOutput(RGB_CI_PIN);
setPinOutput(APA102_DI_PIN);
setPinOutput(APA102_CI_PIN);
writePinLow(RGB_DI_PIN);
writePinLow(RGB_CI_PIN);
writePinLow(APA102_DI_PIN);
writePinLow(APA102_CI_PIN);
}
void apa102_set_brightness(uint8_t brightness) {

View file

@ -23,8 +23,6 @@
#define ADC_PIN A0
#define RGB_CI_PIN A2
#define SOLENOID_PIN B12
#define SOLENOID_PINS { B12, B13, B14, B15 }
#define SOLENOID_PINS_ACTIVE_STATE { high, high, low }

View file

@ -10,5 +10,9 @@
},
"rgblight": {
"pin": "A1"
},
"apa102": {
"data_pin": "A1",
"clock_pin": "A2"
}
}

View file

@ -23,8 +23,6 @@
#define ADC_PIN A0
#define RGB_CI_PIN A2
#define SOLENOID_PIN B12
#define SOLENOID_PINS { B12, B13, B14, B15 }
#define SOLENOID_PINS_ACTIVE_STATE { high, high, low }

View file

@ -11,5 +11,9 @@
},
"rgblight": {
"pin": "A1"
},
"apa102": {
"data_pin": "A1",
"clock_pin": "A2"
}
}

View file

@ -23,8 +23,6 @@
#define ADC_PIN A0
#define RGB_CI_PIN A2
#define SOLENOID_PIN B12
#define SOLENOID_PINS { B12, B13, B14, B15 }
#define SOLENOID_PINS_ACTIVE_STATE { high, high, low }

View file

@ -10,5 +10,9 @@
},
"rgblight": {
"pin": "A1"
},
"apa102": {
"data_pin": "A1",
"clock_pin": "A2"
}
}

View file

@ -23,8 +23,6 @@
#define ADC_PIN A0
#define RGB_CI_PIN A2
#define SOLENOID_PIN B12
#define SOLENOID_PINS { B12, B13, B14, B15 }
#define SOLENOID_PINS_ACTIVE_STATE { high, high, low }

View file

@ -11,5 +11,9 @@
},
"rgblight": {
"pin": "A1"
},
"apa102": {
"data_pin": "A1",
"clock_pin": "A2"
}
}

View file

@ -21,5 +21,3 @@
#define BACKLIGHT_PWM_CHANNEL 1
#define ADC_PIN A0
#define RGB_CI_PIN A2

View file

@ -10,5 +10,9 @@
},
"rgblight": {
"pin": "A1"
},
"apa102": {
"data_pin": "A1",
"clock_pin": "A2"
}
}

View file

@ -22,8 +22,6 @@
#define ADC_PIN A0
#define RGB_CI_PIN A2
// This code does not fit into the really small flash of STM32F103x6 together
// with CONSOLE_ENABLE=yes, and the debugging console is probably more
// important for the "onekey" testing firmware. In a real firmware you may be

View file

@ -11,5 +11,9 @@
},
"rgblight": {
"pin": "A1"
},
"apa102": {
"data_pin": "A1",
"clock_pin": "A2"
}
}

View file

@ -21,5 +21,3 @@
#define BACKLIGHT_PWM_CHANNEL 1
#define ADC_PIN A0
#define RGB_CI_PIN A2

View file

@ -11,5 +11,9 @@
},
"rgblight": {
"pin": "A1"
},
"apa102": {
"data_pin": "A1",
"clock_pin": "A2"
}
}

View file

@ -16,9 +16,6 @@
#pragma once
#define RGB_CI_PIN B1
#define ADC_PIN F6
#define QMK_WAITING_TEST_BUSY_PIN F6

View file

@ -10,5 +10,9 @@
},
"rgblight": {
"pin": "F6"
},
"apa102": {
"data_pin": "F6",
"clock_pin": "B1"
}
}

View file

@ -11,7 +11,6 @@
#define BACKLIGHT_PAL_MODE 2
#define APA102_NOPS (100 / (1000000000L / (CPU_CLOCK / 4)))
#define RGB_CI_PIN B8
#define SOLENOID_PIN B12
#define SOLENOID_PINS { B12, B13, B14, B15 }

View file

@ -11,5 +11,9 @@
},
"rgblight": {
"pin": "A0"
},
"apa102": {
"data_pin": "A0",
"clock_pin": "B8"
}
}

View file

@ -11,7 +11,6 @@
#define BACKLIGHT_PAL_MODE 2
#define APA102_NOPS (100 / (1000000000L / (CPU_CLOCK / 4)))
#define RGB_CI_PIN B8
#define SOLENOID_PIN B12
#define SOLENOID_PINS { B12, B13, B14, B15 }

View file

@ -11,5 +11,9 @@
},
"rgblight": {
"pin": "A0"
},
"apa102": {
"data_pin": "A0",
"clock_pin": "B8"
}
}

View file

@ -7,8 +7,6 @@
#define BACKLIGHT_PWM_CHANNEL 3
#define BACKLIGHT_PAL_MODE 2
#define RGB_CI_PIN B13
#define ADC_PIN A0
#define SOLENOID_PINS { B12, B13, B14, B15 }

View file

@ -11,5 +11,9 @@
},
"rgblight": {
"pin": "A0"
},
"apa102": {
"data_pin": "A0",
"clock_pin": "B13"
}
}

View file

@ -7,6 +7,4 @@
#define BACKLIGHT_PWM_CHANNEL 3
#define BACKLIGHT_PAL_MODE 2
#define RGB_CI_PIN B13
#define ADC_PIN A0

View file

@ -11,5 +11,9 @@
},
"rgblight": {
"pin": "A0"
},
"apa102": {
"data_pin": "A0",
"clock_pin": "B13"
}
}

View file

@ -16,9 +16,6 @@
#pragma once
#define RGB_CI_PIN B1
#define ADC_PIN F6
#define QMK_WAITING_TEST_BUSY_PIN F6

View file

@ -10,5 +10,9 @@
},
"rgblight": {
"pin": "F6"
},
"apa102": {
"data_pin": "F6",
"clock_pin": "B1"
}
}

View file

@ -21,6 +21,4 @@
#define BACKLIGHT_PWM_CHANNEL 3
#define BACKLIGHT_PAL_MODE 2
#define RGB_CI_PIN B13
#define ADC_PIN A0

View file

@ -10,5 +10,9 @@
},
"rgblight": {
"pin": "A0"
},
"apa102": {
"data_pin": "A0",
"clock_pin": "B13"
}
}

View file

@ -20,8 +20,6 @@
#define BACKLIGHT_PWM_DRIVER PWMD5 /* GD32 numbering scheme starts from 0, TIMER4 on GD32 boards is TIMER5 on STM32 boards. */
#define BACKLIGHT_PWM_CHANNEL 2 /* GD32 numbering scheme starts from 0, Channel 1 on GD32 boards is Channel 2 on STM32 boards. */
#define RGB_CI_PIN B13
#define ADC_PIN A0
#define I2C1_CLOCK_SPEED 1000000 /* GD32VF103 supports fast mode plus. */

View file

@ -12,5 +12,9 @@
},
"rgblight": {
"pin": "A2"
},
"apa102": {
"data_pin": "A2",
"clock_pin": "B13"
}
}

View file

@ -22,5 +22,3 @@
#define BACKLIGHT_PAL_MODE 0
#define ADC_PIN A0
#define RGB_CI_PIN B13

View file

@ -11,5 +11,9 @@
},
"rgblight": {
"pin": "B15"
},
"apa102": {
"data_pin": "B15",
"clock_pin": "B13"
}
}

View file

@ -19,7 +19,5 @@
#define ADC_PIN F6
#define RGB_CI_PIN F7
#define QMK_WAITING_TEST_BUSY_PIN F6
#define QMK_WAITING_TEST_YIELD_PIN F7

View file

@ -11,5 +11,9 @@
},
"rgblight": {
"pin": "F6"
},
"apa102": {
"data_pin": "F6",
"clock_pin": "F7"
}
}

View file

@ -19,7 +19,5 @@
#define ADC_PIN F6
#define RGB_CI_PIN F7
#define QMK_WAITING_TEST_BUSY_PIN F6
#define QMK_WAITING_TEST_YIELD_PIN F7

View file

@ -11,5 +11,9 @@
},
"rgblight": {
"pin": "F6"
},
"apa102": {
"data_pin": "F6",
"clock_pin": "F7"
}
}