LED drivers: register naming cleanups (#22436)
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e279c78ba3
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dda6e7fb36
51 changed files with 684 additions and 671 deletions
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@ -19,39 +19,16 @@
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#include "wait.h"
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#include "spi_master.h"
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/* The AW20216S appears to be somewhat similar to the IS31FL743, although quite
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* a few things are different, such as the command byte format and page ordering.
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* The LED addresses start from 0x00 instead of 0x01.
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*/
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#define AW20216S_ID 0b1010 << 4
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#define AW20216S_PAGE_FUNCTION 0x00 << 1 // PG0, Function registers
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#define AW20216S_PAGE_PWM 0x01 << 1 // PG1, LED PWM control
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#define AW20216S_PAGE_SCALING 0x02 << 1 // PG2, LED current scaling control
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#define AW20216S_PAGE_PATCHOICE 0x03 << 1 // PG3, Pattern choice?
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#define AW20216S_PAGE_PWMSCALING 0x04 << 1 // PG4, LED PWM + Scaling control?
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#define AW20216S_WRITE 0
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#define AW20216S_READ 1
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#define AW20216S_REG_CONFIGURATION 0x00 // PG0
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#define AW20216S_REG_GLOBALCURRENT 0x01 // PG0
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#define AW20216S_REG_RESET 0x2F // PG0
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#define AW20216S_REG_MIXFUNCTION 0x46 // PG0
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// Default value of AW20216S_REG_CONFIGURATION
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// D7:D4 = 1011, SWSEL (SW1~SW12 active)
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// D3 = 0?, reserved (apparently this should be 1 but it doesn't seem to matter)
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// D2:D1 = 00, OSDE (open/short detection enable)
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// D0 = 0, CHIPEN (write 1 to enable LEDs when hardware enable pulled high)
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#define AW20216S_CONFIG_DEFAULT 0b10110000
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#define AW20216S_MIXCR_DEFAULT 0b00000000
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#define AW20216S_RESET_CMD 0xAE
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#define AW20216S_CHIPEN 1
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#define AW20216S_LPEN (0x01 << 1)
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#define AW20216S_PWM_REGISTER_COUNT 216
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#ifndef AW20216S_CONFIGURATION
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# define AW20216S_CONFIGURATION (AW20216S_CONFIGURATION_SWSEL_1_12 | AW20216S_CONFIGURATION_CHIPEN)
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#endif
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#ifndef AW20216S_MIX_FUNCTION
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# define AW20216S_MIX_FUNCTION (AW20216S_MIX_FUNCTION_LPEN)
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#endif
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#ifndef AW20216S_SCALING_MAX
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# define AW20216S_SCALING_MAX 150
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#endif
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@ -102,7 +79,7 @@ static inline bool aw20216s_write_register(pin_t cs_pin, uint8_t page, uint8_t r
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}
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void aw20216s_soft_reset(pin_t cs_pin) {
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aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_RESET, AW20216S_RESET_CMD);
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aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_FUNCTION_REG_RESET, AW20216S_RESET_MAGIC);
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}
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static void aw20216s_init_scaling(pin_t cs_pin) {
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@ -114,16 +91,16 @@ static void aw20216s_init_scaling(pin_t cs_pin) {
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static inline void aw20216s_init_current_limit(pin_t cs_pin) {
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// Push config
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aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_GLOBALCURRENT, AW20216S_GLOBAL_CURRENT_MAX);
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aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_FUNCTION_REG_GLOBAL_CURRENT, AW20216S_GLOBAL_CURRENT_MAX);
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}
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static inline void aw20216s_soft_enable(pin_t cs_pin) {
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// Push config
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aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_CONFIGURATION, AW20216S_CONFIG_DEFAULT | AW20216S_CHIPEN);
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aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_FUNCTION_REG_CONFIGURATION, AW20216S_CONFIGURATION);
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}
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static inline void aw20216s_auto_lowpower(pin_t cs_pin) {
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aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_MIXFUNCTION, AW20216S_MIXCR_DEFAULT | AW20216S_LPEN);
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aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_FUNCTION_REG_MIX_FUNCTION, AW20216S_MIX_FUNCTION);
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}
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void aw20216s_init_drivers(void) {
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@ -52,6 +52,28 @@
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#define g_aw_leds g_aw20216s_leds
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// ========
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#define AW20216S_ID (0b1010 << 4)
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#define AW20216S_WRITE 0
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#define AW20216S_READ 1
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#define AW20216S_PAGE_FUNCTION (0x00 << 1)
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#define AW20216S_PAGE_PWM (0x01 << 1)
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#define AW20216S_PAGE_SCALING (0x02 << 1)
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#define AW20216S_PAGE_PATTERN_CHOICE (0x03 << 1)
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#define AW20216S_PAGE_PWM_SCALING (0x04 << 1)
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#define AW20216S_FUNCTION_REG_CONFIGURATION 0x00
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#define AW20216S_CONFIGURATION_SWSEL_1_12 (0b1011 << 4)
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#define AW20216S_CONFIGURATION_CHIPEN (0b1 << 0)
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#define AW20216S_FUNCTION_REG_GLOBAL_CURRENT 0x01
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#define AW20216S_FUNCTION_REG_RESET 0x2F
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#define AW20216S_RESET_MAGIC 0xAE
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#define AW20216S_FUNCTION_REG_MIX_FUNCTION 0x46
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#define AW20216S_MIX_FUNCTION_LPEN (0b1 << 1)
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#if defined(RGB_MATRIX_AW20216S)
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# define AW20216S_LED_COUNT RGB_MATRIX_LED_COUNT
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#endif
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@ -17,13 +17,6 @@
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#include <string.h>
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#include "i2c_master.h"
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// These are the register addresses
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#define IS31FL3218_REG_SHUTDOWN 0x00
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#define IS31FL3218_REG_PWM 0x01
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#define IS31FL3218_REG_CONTROL 0x13
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#define IS31FL3218_REG_UPDATE 0x16
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#define IS31FL3218_REG_RESET 0x17
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#define IS31FL3218_PWM_REGISTER_COUNT 18
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#define IS31FL3218_LED_CONTROL_REGISTER_COUNT 3
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@ -86,7 +79,7 @@ void is31fl3218_init(void) {
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// turn off all LEDs in the LED control register
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for (uint8_t i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
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is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, 0x00);
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is31fl3218_write_register(IS31FL3218_REG_LED_CONTROL_1 + i, 0x00);
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}
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// Load PWM registers and LED Control register data
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@ -146,7 +139,7 @@ void is31fl3218_update_pwm_buffers(void) {
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void is31fl3218_update_led_control_registers(void) {
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if (g_led_control_registers_update_required) {
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for (int i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
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is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, g_led_control_registers[i]);
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is31fl3218_write_register(IS31FL3218_REG_LED_CONTROL_1 + i, g_led_control_registers[i]);
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}
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g_led_control_registers_update_required = false;
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@ -21,6 +21,14 @@
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#include "progmem.h"
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#include "util.h"
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#define IS31FL3218_REG_SHUTDOWN 0x00
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#define IS31FL3218_REG_PWM 0x01
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#define IS31FL3218_REG_LED_CONTROL_1 0x13
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#define IS31FL3218_REG_LED_CONTROL_2 0x14
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#define IS31FL3218_REG_LED_CONTROL_3 0x15
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#define IS31FL3218_REG_UPDATE 0x16
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#define IS31FL3218_REG_RESET 0x17
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#define IS31FL3218_I2C_ADDRESS 0x54
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#if defined(LED_MATRIX_IS31FL3218)
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@ -17,13 +17,6 @@
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#include <string.h>
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#include "i2c_master.h"
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// These are the register addresses
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#define IS31FL3218_REG_SHUTDOWN 0x00
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#define IS31FL3218_REG_PWM 0x01
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#define IS31FL3218_REG_CONTROL 0x13
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#define IS31FL3218_REG_UPDATE 0x16
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#define IS31FL3218_REG_RESET 0x17
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#define IS31FL3218_PWM_REGISTER_COUNT 18
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#define IS31FL3218_LED_CONTROL_REGISTER_COUNT 3
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@ -86,7 +79,7 @@ void is31fl3218_init(void) {
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// turn off all LEDs in the LED control register
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for (uint8_t i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
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is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, 0x00);
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is31fl3218_write_register(IS31FL3218_REG_LED_CONTROL_1 + i, 0x00);
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}
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// Load PWM registers and LED Control register data
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@ -162,7 +155,7 @@ void is31fl3218_update_pwm_buffers(void) {
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void is31fl3218_update_led_control_registers(void) {
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if (g_led_control_registers_update_required) {
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for (int i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) {
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is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, g_led_control_registers[i]);
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is31fl3218_write_register(IS31FL3218_REG_LED_CONTROL_1 + i, g_led_control_registers[i]);
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}
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g_led_control_registers_update_required = false;
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@ -21,6 +21,14 @@
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#include "progmem.h"
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#include "util.h"
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#define IS31FL3218_REG_SHUTDOWN 0x00
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#define IS31FL3218_REG_PWM 0x01
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#define IS31FL3218_REG_LED_CONTROL_1 0x13
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#define IS31FL3218_REG_LED_CONTROL_2 0x14
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#define IS31FL3218_REG_LED_CONTROL_3 0x15
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#define IS31FL3218_REG_UPDATE 0x16
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#define IS31FL3218_REG_RESET 0x17
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#define IS31FL3218_I2C_ADDRESS 0x54
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#if defined(RGB_MATRIX_IS31FL3218)
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@ -22,26 +22,6 @@
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#include "i2c_master.h"
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#include "wait.h"
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#define IS31FL3731_REG_CONFIG 0x00
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#define IS31FL3731_REG_CONFIG_PICTUREMODE 0x00
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#define IS31FL3731_REG_CONFIG_AUTOPLAYMODE 0x08
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#define IS31FL3731_REG_CONFIG_AUDIOPLAYMODE 0x18
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#define IS31FL3731_CONF_PICTUREMODE 0x00
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#define IS31FL3731_CONF_AUTOFRAMEMODE 0x04
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#define IS31FL3731_CONF_AUDIOMODE 0x08
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#define IS31FL3731_REG_PICTUREFRAME 0x01
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// Not defined in the datasheet -- See AN for IC
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#define IS31FL3731_REG_GHOST_IMAGE_PREVENTION 0xC2 // Set bit 4 to enable de-ghosting
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#define IS31FL3731_REG_SHUTDOWN 0x0A
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#define IS31FL3731_REG_AUDIOSYNC 0x06
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#define IS31FL3731_COMMANDREGISTER 0xFD
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#define IS31FL3731_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine'
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#define IS31FL3731_PWM_REGISTER_COUNT 144
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#define IS31FL3731_LED_CONTROL_REGISTER_COUNT 18
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@ -144,26 +124,26 @@ void is31fl3731_init(uint8_t addr) {
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// then disable software shutdown.
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// select "function register" bank
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is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG);
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is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FUNCTION);
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// enable software shutdown
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is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x00);
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is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_SHUTDOWN, 0x00);
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#ifdef IS31FL3731_DEGHOST // set to enable de-ghosting of the array
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is31fl3731_write_register(addr, IS31FL3731_REG_GHOST_IMAGE_PREVENTION, 0x10);
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is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_GHOST_IMAGE_PREVENTION, IS31FL3731_GHOST_IMAGE_PREVENTION_GEN);
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#endif
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// this delay was copied from other drivers, might not be needed
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wait_ms(10);
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// picture mode
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is31fl3731_write_register(addr, IS31FL3731_REG_CONFIG, IS31FL3731_REG_CONFIG_PICTUREMODE);
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is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_CONFIG, IS31FL3731_CONFIG_MODE_PICTURE);
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// display frame 0
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is31fl3731_write_register(addr, IS31FL3731_REG_PICTUREFRAME, 0x00);
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is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_PICTURE_DISPLAY, 0x00);
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// audio sync off
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is31fl3731_write_register(addr, IS31FL3731_REG_AUDIOSYNC, 0x00);
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is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_AUDIO_SYNC, 0x00);
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// select bank 0
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is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0);
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is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FRAME_1);
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// turn off all LEDs in the LED control register
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for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
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}
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// select "function register" bank
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is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG);
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is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FUNCTION);
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// disable software shutdown
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is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x01);
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is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_SHUTDOWN, 0x01);
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// select bank 0 and leave it selected.
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// most usage after initialization is just writing PWM buffers in bank 0
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// as there's not much point in double-buffering
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is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0);
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is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FRAME_1);
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}
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void is31fl3731_set_value(int index, uint8_t value) {
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#define g_is31_leds g_is31fl3731_leds
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// ========
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#define IS31FL3731_REG_COMMAND 0xFD
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#define IS31FL3731_COMMAND_FRAME_1 0x00
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#define IS31FL3731_COMMAND_FRAME_2 0x01
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#define IS31FL3731_COMMAND_FRAME_3 0x02
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#define IS31FL3731_COMMAND_FRAME_4 0x03
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#define IS31FL3731_COMMAND_FRAME_5 0x04
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#define IS31FL3731_COMMAND_FRAME_6 0x05
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#define IS31FL3731_COMMAND_FRAME_7 0x06
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#define IS31FL3731_COMMAND_FRAME_8 0x07
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#define IS31FL3731_COMMAND_FUNCTION 0x0B
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#define IS31FL3731_FUNCTION_REG_CONFIG 0x00
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#define IS31FL3731_CONFIG_MODE_PICTURE 0x00
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#define IS31FL3731_CONFIG_MODE_AUTO_PLAY 0x08
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#define IS31FL3731_CONFIG_MODE_AUDIO_PLAY 0x18
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#define IS31FL3731_FUNCTION_REG_PICTURE_DISPLAY 0x01
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#define IS31FL3731_FUNCTION_REG_AUDIO_SYNC 0x06
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#define IS31FL3731_FUNCTION_REG_SHUTDOWN 0x0A
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// Not defined in the datasheet -- See AN for IC
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#define IS31FL3731_FUNCTION_REG_GHOST_IMAGE_PREVENTION 0xC2
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#define IS31FL3731_GHOST_IMAGE_PREVENTION_GEN 0x10
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#define IS31FL3731_I2C_ADDRESS_GND 0x74
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#define IS31FL3731_I2C_ADDRESS_SCL 0x75
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#define IS31FL3731_I2C_ADDRESS_SDA 0x76
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#include "i2c_master.h"
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#include "wait.h"
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#define IS31FL3731_REG_CONFIG 0x00
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#define IS31FL3731_REG_CONFIG_PICTUREMODE 0x00
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#define IS31FL3731_REG_CONFIG_AUTOPLAYMODE 0x08
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#define IS31FL3731_REG_CONFIG_AUDIOPLAYMODE 0x18
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#define IS31FL3731_CONF_PICTUREMODE 0x00
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#define IS31FL3731_CONF_AUTOFRAMEMODE 0x04
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#define IS31FL3731_CONF_AUDIOMODE 0x08
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#define IS31FL3731_REG_PICTUREFRAME 0x01
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// Not defined in the datasheet -- See AN for IC
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#define IS31FL3731_REG_GHOST_IMAGE_PREVENTION 0xC2 // Set bit 4 to enable de-ghosting
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#define IS31FL3731_REG_SHUTDOWN 0x0A
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#define IS31FL3731_REG_AUDIOSYNC 0x06
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#define IS31FL3731_COMMANDREGISTER 0xFD
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#define IS31FL3731_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine'
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#define IS31FL3731_PWM_REGISTER_COUNT 144
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#define IS31FL3731_LED_CONTROL_REGISTER_COUNT 18
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@ -141,26 +121,26 @@ void is31fl3731_init(uint8_t addr) {
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// then disable software shutdown.
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// select "function register" bank
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is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG);
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is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FUNCTION);
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// enable software shutdown
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is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x00);
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is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_SHUTDOWN, 0x00);
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#ifdef IS31FL3731_DEGHOST // set to enable de-ghosting of the array
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is31fl3731_write_register(addr, IS31FL3731_REG_GHOST_IMAGE_PREVENTION, 0x10);
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is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_GHOST_IMAGE_PREVENTION, IS31FL3731_GHOST_IMAGE_PREVENTION_GEN);
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#endif
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|
||||
// this delay was copied from other drivers, might not be needed
|
||||
wait_ms(10);
|
||||
|
||||
// picture mode
|
||||
is31fl3731_write_register(addr, IS31FL3731_REG_CONFIG, IS31FL3731_REG_CONFIG_PICTUREMODE);
|
||||
is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_CONFIG, IS31FL3731_CONFIG_MODE_PICTURE);
|
||||
// display frame 0
|
||||
is31fl3731_write_register(addr, IS31FL3731_REG_PICTUREFRAME, 0x00);
|
||||
is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_PICTURE_DISPLAY, 0x00);
|
||||
// audio sync off
|
||||
is31fl3731_write_register(addr, IS31FL3731_REG_AUDIOSYNC, 0x00);
|
||||
is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_AUDIO_SYNC, 0x00);
|
||||
|
||||
// select bank 0
|
||||
is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0);
|
||||
is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FRAME_1);
|
||||
|
||||
// turn off all LEDs in the LED control register
|
||||
for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
|
@ -178,15 +158,15 @@ void is31fl3731_init(uint8_t addr) {
|
|||
}
|
||||
|
||||
// select "function register" bank
|
||||
is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG);
|
||||
is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FUNCTION);
|
||||
|
||||
// disable software shutdown
|
||||
is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x01);
|
||||
is31fl3731_write_register(addr, IS31FL3731_FUNCTION_REG_SHUTDOWN, 0x01);
|
||||
|
||||
// select bank 0 and leave it selected.
|
||||
// most usage after initialization is just writing PWM buffers in bank 0
|
||||
// as there's not much point in double-buffering
|
||||
is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0);
|
||||
is31fl3731_write_register(addr, IS31FL3731_REG_COMMAND, IS31FL3731_COMMAND_FRAME_1);
|
||||
}
|
||||
|
||||
void is31fl3731_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
|
||||
|
|
|
@ -49,6 +49,30 @@
|
|||
#define g_is31_leds g_is31fl3731_leds
|
||||
// ========
|
||||
|
||||
#define IS31FL3731_REG_COMMAND 0xFD
|
||||
#define IS31FL3731_COMMAND_FRAME_1 0x00
|
||||
#define IS31FL3731_COMMAND_FRAME_2 0x01
|
||||
#define IS31FL3731_COMMAND_FRAME_3 0x02
|
||||
#define IS31FL3731_COMMAND_FRAME_4 0x03
|
||||
#define IS31FL3731_COMMAND_FRAME_5 0x04
|
||||
#define IS31FL3731_COMMAND_FRAME_6 0x05
|
||||
#define IS31FL3731_COMMAND_FRAME_7 0x06
|
||||
#define IS31FL3731_COMMAND_FRAME_8 0x07
|
||||
#define IS31FL3731_COMMAND_FUNCTION 0x0B
|
||||
|
||||
#define IS31FL3731_FUNCTION_REG_CONFIG 0x00
|
||||
#define IS31FL3731_CONFIG_MODE_PICTURE 0x00
|
||||
#define IS31FL3731_CONFIG_MODE_AUTO_PLAY 0x08
|
||||
#define IS31FL3731_CONFIG_MODE_AUDIO_PLAY 0x18
|
||||
|
||||
#define IS31FL3731_FUNCTION_REG_PICTURE_DISPLAY 0x01
|
||||
#define IS31FL3731_FUNCTION_REG_AUDIO_SYNC 0x06
|
||||
#define IS31FL3731_FUNCTION_REG_SHUTDOWN 0x0A
|
||||
|
||||
// Not defined in the datasheet -- See AN for IC
|
||||
#define IS31FL3731_FUNCTION_REG_GHOST_IMAGE_PREVENTION 0xC2
|
||||
#define IS31FL3731_GHOST_IMAGE_PREVENTION_GEN 0x10
|
||||
|
||||
#define IS31FL3731_I2C_ADDRESS_GND 0x74
|
||||
#define IS31FL3731_I2C_ADDRESS_SCL 0x75
|
||||
#define IS31FL3731_I2C_ADDRESS_SDA 0x76
|
||||
|
|
|
@ -23,22 +23,6 @@
|
|||
#include "i2c_master.h"
|
||||
#include "wait.h"
|
||||
|
||||
#define IS31FL3733_COMMANDREGISTER 0xFD
|
||||
#define IS31FL3733_COMMANDREGISTER_WRITELOCK 0xFE
|
||||
#define IS31FL3733_INTERRUPTMASKREGISTER 0xF0
|
||||
#define IS31FL3733_INTERRUPTSTATUSREGISTER 0xF1
|
||||
|
||||
#define IS31FL3733_PAGE_LEDCONTROL 0x00 // PG0
|
||||
#define IS31FL3733_PAGE_PWM 0x01 // PG1
|
||||
#define IS31FL3733_PAGE_AUTOBREATH 0x02 // PG2
|
||||
#define IS31FL3733_PAGE_FUNCTION 0x03 // PG3
|
||||
|
||||
#define IS31FL3733_REG_CONFIGURATION 0x00 // PG3
|
||||
#define IS31FL3733_REG_GLOBALCURRENT 0x01 // PG3
|
||||
#define IS31FL3733_REG_RESET 0x11 // PG3
|
||||
#define IS31FL3733_REG_SW_PULLUP 0x0F // PG3
|
||||
#define IS31FL3733_REG_CS_PULLDOWN 0x10 // PG3
|
||||
|
||||
#define IS31FL3733_PWM_REGISTER_COUNT 192
|
||||
#define IS31FL3733_LED_CONTROL_REGISTER_COUNT 24
|
||||
|
||||
|
@ -62,8 +46,8 @@
|
|||
# define IS31FL3733_CSPULLDOWN IS31FL3733_PDR_0_OHM
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3733_GLOBALCURRENT
|
||||
# define IS31FL3733_GLOBALCURRENT 0xFF
|
||||
#ifndef IS31FL3733_GLOBAL_CURRENT
|
||||
# define IS31FL3733_GLOBAL_CURRENT 0xFF
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3733_SYNC_1
|
||||
|
@ -180,20 +164,20 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
|
|||
// Sync is passed so set it according to the datasheet.
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG0
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_LED_CONTROL);
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG1
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_PWM);
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) {
|
||||
|
@ -201,18 +185,18 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
|
|||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG3
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_FUNCTION);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_FUNCTION);
|
||||
// Set de-ghost pull-up resistors (SWx)
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_SW_PULLUP, IS31FL3733_SW_PULLUP);
|
||||
is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_SW_PULLUP, IS31FL3733_SW_PULLUP);
|
||||
// Set de-ghost pull-down resistors (CSx)
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN);
|
||||
is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN);
|
||||
// Set global current to maximum.
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_GLOBALCURRENT, IS31FL3733_GLOBALCURRENT);
|
||||
is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3733_GLOBAL_CURRENT);
|
||||
// Disable software shutdown.
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
|
||||
// Wait 10ms to ensure the device has woken up.
|
||||
wait_ms(10);
|
||||
|
@ -256,8 +240,8 @@ void is31fl3733_set_led_control_register(uint8_t index, bool value) {
|
|||
void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG1.
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_PWM);
|
||||
|
||||
// If any of the transactions fail we risk writing dirty PG0,
|
||||
// refresh page 0 just in case.
|
||||
|
@ -271,8 +255,8 @@ void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
|||
void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG0
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
|
|
@ -42,7 +42,7 @@
|
|||
# define IS31FL3733_CS_PULLDOWN ISSI_CSPULLUP
|
||||
#endif
|
||||
#ifdef ISSI_GLOBALCURRENT
|
||||
# define IS31FL3733_GLOBALCURRENT ISSI_GLOBALCURRENT
|
||||
# define IS31FL3733_GLOBAL_CURRENT ISSI_GLOBALCURRENT
|
||||
#endif
|
||||
|
||||
#define is31_led is31fl3733_led_t
|
||||
|
@ -57,6 +57,25 @@
|
|||
#define PUR_32KR IS31FL3733_PUR_32K_OHM
|
||||
// ========
|
||||
|
||||
#define IS31FL3733_REG_INTERRUPT_MASK 0xF0
|
||||
#define IS31FL3733_REG_INTERRUPT_STATUS 0xF1
|
||||
|
||||
#define IS31FL3733_REG_COMMAND 0xFD
|
||||
|
||||
#define IS31FL3733_COMMAND_LED_CONTROL 0x00
|
||||
#define IS31FL3733_COMMAND_PWM 0x01
|
||||
#define IS31FL3733_COMMAND_AUTO_BREATH 0x02
|
||||
#define IS31FL3733_COMMAND_FUNCTION 0x03
|
||||
|
||||
#define IS31FL3733_FUNCTION_REG_CONFIGURATION 0x00
|
||||
#define IS31FL3733_FUNCTION_REG_GLOBAL_CURRENT 0x01
|
||||
#define IS31FL3733_FUNCTION_REG_SW_PULLUP 0x0F
|
||||
#define IS31FL3733_FUNCTION_REG_CS_PULLDOWN 0x10
|
||||
#define IS31FL3733_FUNCTION_REG_RESET 0x11
|
||||
|
||||
#define IS31FL3733_REG_COMMAND_WRITE_LOCK 0xFE
|
||||
#define IS31FL3733_COMMAND_WRITE_LOCK_MAGIC 0xC5
|
||||
|
||||
#define IS31FL3733_I2C_ADDRESS_GND_GND 0x50
|
||||
#define IS31FL3733_I2C_ADDRESS_GND_SCL 0x51
|
||||
#define IS31FL3733_I2C_ADDRESS_GND_SDA 0x52
|
||||
|
|
|
@ -22,22 +22,6 @@
|
|||
#include "i2c_master.h"
|
||||
#include "wait.h"
|
||||
|
||||
#define IS31FL3733_COMMANDREGISTER 0xFD
|
||||
#define IS31FL3733_COMMANDREGISTER_WRITELOCK 0xFE
|
||||
#define IS31FL3733_INTERRUPTMASKREGISTER 0xF0
|
||||
#define IS31FL3733_INTERRUPTSTATUSREGISTER 0xF1
|
||||
|
||||
#define IS31FL3733_PAGE_LEDCONTROL 0x00 // PG0
|
||||
#define IS31FL3733_PAGE_PWM 0x01 // PG1
|
||||
#define IS31FL3733_PAGE_AUTOBREATH 0x02 // PG2
|
||||
#define IS31FL3733_PAGE_FUNCTION 0x03 // PG3
|
||||
|
||||
#define IS31FL3733_REG_CONFIGURATION 0x00 // PG3
|
||||
#define IS31FL3733_REG_GLOBALCURRENT 0x01 // PG3
|
||||
#define IS31FL3733_REG_RESET 0x11 // PG3
|
||||
#define IS31FL3733_REG_SW_PULLUP 0x0F // PG3
|
||||
#define IS31FL3733_REG_CS_PULLDOWN 0x10 // PG3
|
||||
|
||||
#define IS31FL3733_PWM_REGISTER_COUNT 192
|
||||
#define IS31FL3733_LED_CONTROL_REGISTER_COUNT 24
|
||||
|
||||
|
@ -61,8 +45,8 @@
|
|||
# define IS31FL3733_CS_PULLDOWN IS31FL3733_PDR_0_OHM
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3733_GLOBALCURRENT
|
||||
# define IS31FL3733_GLOBALCURRENT 0xFF
|
||||
#ifndef IS31FL3733_GLOBAL_CURRENT
|
||||
# define IS31FL3733_GLOBAL_CURRENT 0xFF
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3733_SYNC_1
|
||||
|
@ -179,20 +163,20 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
|
|||
// Sync is passed so set it according to the datasheet.
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG0
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_LED_CONTROL);
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG1
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_PWM);
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) {
|
||||
|
@ -200,18 +184,18 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) {
|
|||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG3
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_FUNCTION);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_FUNCTION);
|
||||
// Set de-ghost pull-up resistors (SWx)
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_SW_PULLUP, IS31FL3733_SW_PULLUP);
|
||||
is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_SW_PULLUP, IS31FL3733_SW_PULLUP);
|
||||
// Set de-ghost pull-down resistors (CSx)
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN);
|
||||
is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN);
|
||||
// Set global current to maximum.
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_GLOBALCURRENT, IS31FL3733_GLOBALCURRENT);
|
||||
is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3733_GLOBAL_CURRENT);
|
||||
// Disable software shutdown.
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
is31fl3733_write_register(addr, IS31FL3733_FUNCTION_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
|
||||
// Wait 10ms to ensure the device has woken up.
|
||||
wait_ms(10);
|
||||
|
@ -271,8 +255,8 @@ void is31fl3733_set_led_control_register(uint8_t index, bool red, bool green, bo
|
|||
void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG1.
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_PWM);
|
||||
|
||||
// If any of the transactions fail we risk writing dirty PG0,
|
||||
// refresh page 0 just in case.
|
||||
|
@ -286,8 +270,8 @@ void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
|||
void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG0
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3733_write_register(addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
|
|
@ -65,7 +65,7 @@
|
|||
# define IS31FL3733_CS_PULLDOWN ISSI_CSPULLUP
|
||||
#endif
|
||||
#ifdef ISSI_GLOBALCURRENT
|
||||
# define IS31FL3733_GLOBALCURRENT ISSI_GLOBALCURRENT
|
||||
# define IS31FL3733_GLOBAL_CURRENT ISSI_GLOBALCURRENT
|
||||
#endif
|
||||
|
||||
#define is31_led is31fl3733_led_t
|
||||
|
@ -80,6 +80,25 @@
|
|||
#define PUR_32KR IS31FL3733_PUR_32K_OHM
|
||||
// ========
|
||||
|
||||
#define IS31FL3733_REG_INTERRUPT_MASK 0xF0
|
||||
#define IS31FL3733_REG_INTERRUPT_STATUS 0xF1
|
||||
|
||||
#define IS31FL3733_REG_COMMAND 0xFD
|
||||
|
||||
#define IS31FL3733_COMMAND_LED_CONTROL 0x00
|
||||
#define IS31FL3733_COMMAND_PWM 0x01
|
||||
#define IS31FL3733_COMMAND_AUTO_BREATH 0x02
|
||||
#define IS31FL3733_COMMAND_FUNCTION 0x03
|
||||
|
||||
#define IS31FL3733_FUNCTION_REG_CONFIGURATION 0x00
|
||||
#define IS31FL3733_FUNCTION_REG_GLOBAL_CURRENT 0x01
|
||||
#define IS31FL3733_FUNCTION_REG_SW_PULLUP 0x0F
|
||||
#define IS31FL3733_FUNCTION_REG_CS_PULLDOWN 0x10
|
||||
#define IS31FL3733_FUNCTION_REG_RESET 0x11
|
||||
|
||||
#define IS31FL3733_REG_COMMAND_WRITE_LOCK 0xFE
|
||||
#define IS31FL3733_COMMAND_WRITE_LOCK_MAGIC 0xC5
|
||||
|
||||
#define IS31FL3733_I2C_ADDRESS_GND_GND 0x50
|
||||
#define IS31FL3733_I2C_ADDRESS_GND_SCL 0x51
|
||||
#define IS31FL3733_I2C_ADDRESS_GND_SDA 0x52
|
||||
|
|
|
@ -20,22 +20,6 @@
|
|||
#include "i2c_master.h"
|
||||
#include "wait.h"
|
||||
|
||||
#define IS31FL3736_COMMANDREGISTER 0xFD
|
||||
#define IS31FL3736_COMMANDREGISTER_WRITELOCK 0xFE
|
||||
#define IS31FL3736_INTERRUPTMASKREGISTER 0xF0
|
||||
#define IS31FL3736_INTERRUPTSTATUSREGISTER 0xF1
|
||||
|
||||
#define IS31FL3736_PAGE_LEDCONTROL 0x00 // PG0
|
||||
#define IS31FL3736_PAGE_PWM 0x01 // PG1
|
||||
#define IS31FL3736_PAGE_AUTOBREATH 0x02 // PG2
|
||||
#define IS31FL3736_PAGE_FUNCTION 0x03 // PG3
|
||||
|
||||
#define IS31FL3736_REG_CONFIGURATION 0x00 // PG3
|
||||
#define IS31FL3736_REG_GLOBALCURRENT 0x01 // PG3
|
||||
#define IS31FL3736_REG_RESET 0x11 // PG3
|
||||
#define IS31FL3736_REG_SW_PULLUP 0x0F // PG3
|
||||
#define IS31FL3736_REG_CS_PULLDOWN 0x10 // PG3
|
||||
|
||||
#define IS31FL3736_PWM_REGISTER_COUNT 192 // actually 96
|
||||
#define IS31FL3736_LED_CONTROL_REGISTER_COUNT 24
|
||||
|
||||
|
@ -59,8 +43,8 @@
|
|||
# define IS31FL3736_CS_PULLDOWN IS31FL3736_PDR_0_OHM
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3736_GLOBALCURRENT
|
||||
# define IS31FL3736_GLOBALCURRENT 0xFF
|
||||
#ifndef IS31FL3736_GLOBAL_CURRENT
|
||||
# define IS31FL3736_GLOBAL_CURRENT 0xFF
|
||||
#endif
|
||||
|
||||
// Transfer buffer for TWITransmitData()
|
||||
|
@ -152,20 +136,20 @@ void is31fl3736_init(uint8_t addr) {
|
|||
// then disable software shutdown.
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG0
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_LED_CONTROL);
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3736_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG1
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_PWM);
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) {
|
||||
|
@ -173,18 +157,18 @@ void is31fl3736_init(uint8_t addr) {
|
|||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG3
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_FUNCTION);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_FUNCTION);
|
||||
// Set de-ghost pull-up resistors (SWx)
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_SW_PULLUP, IS31FL3736_SW_PULLUP);
|
||||
is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_SW_PULLUP, IS31FL3736_SW_PULLUP);
|
||||
// Set de-ghost pull-down resistors (CSx)
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_CS_PULLDOWN, IS31FL3736_CS_PULLDOWN);
|
||||
is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_CS_PULLDOWN, IS31FL3736_CS_PULLDOWN);
|
||||
// Set global current to maximum.
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_GLOBALCURRENT, IS31FL3736_GLOBALCURRENT);
|
||||
is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3736_GLOBAL_CURRENT);
|
||||
// Disable software shutdown.
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_CONFIGURATION, ((IS31FL3736_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_CONFIGURATION, ((IS31FL3736_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
|
||||
// Wait 10ms to ensure the device has woken up.
|
||||
wait_ms(10);
|
||||
|
@ -234,8 +218,8 @@ void is31fl3736_set_led_control_register(uint8_t index, bool value) {
|
|||
void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG1
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_PWM);
|
||||
|
||||
is31fl3736_write_pwm_buffer(addr, g_pwm_buffer[index]);
|
||||
g_pwm_buffer_update_required[index] = false;
|
||||
|
@ -245,8 +229,8 @@ void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
|||
void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG0
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3736_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
# define IS31FL3736_CS_PULLDOWN ISSI_CSPULLUP
|
||||
#endif
|
||||
#ifdef ISSI_GLOBALCURRENT
|
||||
# define IS31FL3736_GLOBALCURRENT ISSI_GLOBALCURRENT
|
||||
# define IS31FL3736_GLOBAL_CURRENT ISSI_GLOBALCURRENT
|
||||
#endif
|
||||
|
||||
#define is31_led is31fl3736_led_t
|
||||
|
@ -52,6 +52,25 @@
|
|||
#define PUR_32KR IS31FL3736_PUR_32K_OHM
|
||||
// ========
|
||||
|
||||
#define IS31FL3736_REG_INTERRUPT_MASK 0xF0
|
||||
#define IS31FL3736_REG_INTERRUPT_STATUS 0xF1
|
||||
|
||||
#define IS31FL3736_REG_COMMAND 0xFD
|
||||
|
||||
#define IS31FL3736_COMMAND_LED_CONTROL 0x00
|
||||
#define IS31FL3736_COMMAND_PWM 0x01
|
||||
#define IS31FL3736_COMMAND_AUTO_BREATH 0x02
|
||||
#define IS31FL3736_COMMAND_FUNCTION 0x03
|
||||
|
||||
#define IS31FL3736_FUNCTION_REG_CONFIGURATION 0x00
|
||||
#define IS31FL3736_FUNCTION_REG_GLOBAL_CURRENT 0x01
|
||||
#define IS31FL3736_FUNCTION_REG_SW_PULLUP 0x0F
|
||||
#define IS31FL3736_FUNCTION_REG_CS_PULLDOWN 0x10
|
||||
#define IS31FL3736_FUNCTION_REG_RESET 0x11
|
||||
|
||||
#define IS31FL3736_REG_COMMAND_WRITE_LOCK 0xFE
|
||||
#define IS31FL3736_COMMAND_WRITE_LOCK_MAGIC 0xC5
|
||||
|
||||
#define IS31FL3736_I2C_ADDRESS_GND_GND 0x50
|
||||
#define IS31FL3736_I2C_ADDRESS_GND_SCL 0x51
|
||||
#define IS31FL3736_I2C_ADDRESS_GND_SDA 0x52
|
||||
|
|
|
@ -20,22 +20,6 @@
|
|||
#include "i2c_master.h"
|
||||
#include "wait.h"
|
||||
|
||||
#define IS31FL3736_COMMANDREGISTER 0xFD
|
||||
#define IS31FL3736_COMMANDREGISTER_WRITELOCK 0xFE
|
||||
#define IS31FL3736_INTERRUPTMASKREGISTER 0xF0
|
||||
#define IS31FL3736_INTERRUPTSTATUSREGISTER 0xF1
|
||||
|
||||
#define IS31FL3736_PAGE_LEDCONTROL 0x00 // PG0
|
||||
#define IS31FL3736_PAGE_PWM 0x01 // PG1
|
||||
#define IS31FL3736_PAGE_AUTOBREATH 0x02 // PG2
|
||||
#define IS31FL3736_PAGE_FUNCTION 0x03 // PG3
|
||||
|
||||
#define IS31FL3736_REG_CONFIGURATION 0x00 // PG3
|
||||
#define IS31FL3736_REG_GLOBALCURRENT 0x01 // PG3
|
||||
#define IS31FL3736_REG_RESET 0x11 // PG3
|
||||
#define IS31FL3736_REG_SW_PULLUP 0x0F // PG3
|
||||
#define IS31FL3736_REG_CS_PULLDOWN 0x10 // PG3
|
||||
|
||||
#define IS31FL3736_PWM_REGISTER_COUNT 192 // actually 96
|
||||
#define IS31FL3736_LED_CONTROL_REGISTER_COUNT 24
|
||||
|
||||
|
@ -59,8 +43,8 @@
|
|||
# define IS31FL3736_CS_PULLDOWN IS31FL3736_PDR_0_OHM
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3736_GLOBALCURRENT
|
||||
# define IS31FL3736_GLOBALCURRENT 0xFF
|
||||
#ifndef IS31FL3736_GLOBAL_CURRENT
|
||||
# define IS31FL3736_GLOBAL_CURRENT 0xFF
|
||||
#endif
|
||||
|
||||
// Transfer buffer for TWITransmitData()
|
||||
|
@ -152,20 +136,20 @@ void is31fl3736_init(uint8_t addr) {
|
|||
// then disable software shutdown.
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG0
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_REG_LED_CONTROL);
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3736_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITELOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG1
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_PWM);
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) {
|
||||
|
@ -173,18 +157,18 @@ void is31fl3736_init(uint8_t addr) {
|
|||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG3
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_FUNCTION);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_FUNCTION);
|
||||
// Set de-ghost pull-up resistors (SWx)
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_SW_PULLUP, IS31FL3736_SW_PULLUP);
|
||||
is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_SW_PULLUP, IS31FL3736_SW_PULLUP);
|
||||
// Set de-ghost pull-down resistors (CSx)
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_CS_PULLDOWN, IS31FL3736_CS_PULLDOWN);
|
||||
is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_CS_PULLDOWN, IS31FL3736_CS_PULLDOWN);
|
||||
// Set global current to maximum.
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_GLOBALCURRENT, IS31FL3736_GLOBALCURRENT);
|
||||
is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3736_GLOBAL_CURRENT);
|
||||
// Disable software shutdown.
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_CONFIGURATION, ((IS31FL3736_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
is31fl3736_write_register(addr, IS31FL3736_FUNCTION_REG_CONFIGURATION, ((IS31FL3736_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
|
||||
// Wait 10ms to ensure the device has woken up.
|
||||
wait_ms(10);
|
||||
|
@ -251,8 +235,8 @@ void is31fl3736_set_led_control_register(uint8_t index, bool red, bool green, bo
|
|||
void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG1
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_PWM);
|
||||
|
||||
is31fl3736_write_pwm_buffer(addr, g_pwm_buffer[index]);
|
||||
g_pwm_buffer_update_required[index] = false;
|
||||
|
@ -262,8 +246,8 @@ void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
|||
void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG0
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND_WRITE_LOCK, IS31FL3736_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3736_write_register(addr, IS31FL3736_REG_COMMAND, IS31FL3736_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3736_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
|
|
@ -48,7 +48,7 @@
|
|||
# define IS31FL3736_CS_PULLDOWN ISSI_CSPULLUP
|
||||
#endif
|
||||
#ifdef ISSI_GLOBALCURRENT
|
||||
# define IS31FL3736_GLOBALCURRENT ISSI_GLOBALCURRENT
|
||||
# define IS31FL3736_GLOBAL_CURRENT ISSI_GLOBALCURRENT
|
||||
#endif
|
||||
|
||||
#define is31_led is31fl3736_led_t
|
||||
|
@ -64,6 +64,25 @@
|
|||
#define PUR_32KR IS31FL3736_PUR_32K_OHM
|
||||
// ========
|
||||
|
||||
#define IS31FL3736_REG_INTERRUPT_MASK 0xF0
|
||||
#define IS31FL3736_REG_INTERRUPT_STATUS 0xF1
|
||||
|
||||
#define IS31FL3736_REG_COMMAND 0xFD
|
||||
|
||||
#define IS31FL3736_COMMAND_LED_CONTROL 0x00
|
||||
#define IS31FL3736_COMMAND_PWM 0x01
|
||||
#define IS31FL3736_COMMAND_AUTO_BREATH 0x02
|
||||
#define IS31FL3736_COMMAND_FUNCTION 0x03
|
||||
|
||||
#define IS31FL3736_FUNCTION_REG_CONFIGURATION 0x00
|
||||
#define IS31FL3736_FUNCTION_REG_GLOBAL_CURRENT 0x01
|
||||
#define IS31FL3736_FUNCTION_REG_SW_PULLUP 0x0F
|
||||
#define IS31FL3736_FUNCTION_REG_CS_PULLDOWN 0x10
|
||||
#define IS31FL3736_FUNCTION_REG_RESET 0x11
|
||||
|
||||
#define IS31FL3736_REG_COMMAND_WRITE_LOCK 0xFE
|
||||
#define IS31FL3736_COMMAND_WRITE_LOCK_MAGIC 0xC5
|
||||
|
||||
#define IS31FL3736_I2C_ADDRESS_GND_GND 0x50
|
||||
#define IS31FL3736_I2C_ADDRESS_GND_SCL 0x51
|
||||
#define IS31FL3736_I2C_ADDRESS_GND_SDA 0x52
|
||||
|
|
|
@ -22,22 +22,6 @@
|
|||
#include "i2c_master.h"
|
||||
#include "wait.h"
|
||||
|
||||
#define IS31FL3737_COMMANDREGISTER 0xFD
|
||||
#define IS31FL3737_COMMANDREGISTER_WRITELOCK 0xFE
|
||||
#define IS31FL3737_INTERRUPTMASKREGISTER 0xF0
|
||||
#define IS31FL3737_INTERRUPTSTATUSREGISTER 0xF1
|
||||
|
||||
#define IS31FL3737_PAGE_LEDCONTROL 0x00 // PG0
|
||||
#define IS31FL3737_PAGE_PWM 0x01 // PG1
|
||||
#define IS31FL3737_PAGE_AUTOBREATH 0x02 // PG2
|
||||
#define IS31FL3737_PAGE_FUNCTION 0x03 // PG3
|
||||
|
||||
#define IS31FL3737_REG_CONFIGURATION 0x00 // PG3
|
||||
#define IS31FL3737_REG_GLOBALCURRENT 0x01 // PG3
|
||||
#define IS31FL3737_REG_RESET 0x11 // PG3
|
||||
#define IS31FL3737_REG_SW_PULLUP 0x0F // PG3
|
||||
#define IS31FL3737_REG_CS_PULLDOWN 0x10 // PG3
|
||||
|
||||
#define IS31FL3737_PWM_REGISTER_COUNT 192 // actually 144
|
||||
#define IS31FL3737_LED_CONTROL_REGISTER_COUNT 24
|
||||
|
||||
|
@ -61,8 +45,8 @@
|
|||
# define IS31FL3737_CS_PULLDOWN IS31FL3737_PDR_0_OHM
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3737_GLOBALCURRENT
|
||||
# define IS31FL3737_GLOBALCURRENT 0xFF
|
||||
#ifndef IS31FL3737_GLOBAL_CURRENT
|
||||
# define IS31FL3737_GLOBAL_CURRENT 0xFF
|
||||
#endif
|
||||
|
||||
// Transfer buffer for TWITransmitData()
|
||||
|
@ -155,20 +139,20 @@ void is31fl3737_init(uint8_t addr) {
|
|||
// then disable software shutdown.
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG0
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_LED_CONTROL);
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3737_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG1
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_PWM);
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) {
|
||||
|
@ -176,18 +160,18 @@ void is31fl3737_init(uint8_t addr) {
|
|||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG3
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_FUNCTION);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_FUNCTION);
|
||||
// Set de-ghost pull-up resistors (SWx)
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_SW_PULLUP, IS31FL3737_SW_PULLUP);
|
||||
is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_SW_PULLUP, IS31FL3737_SW_PULLUP);
|
||||
// Set de-ghost pull-down resistors (CSx)
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_CS_PULLDOWN, IS31FL3737_CS_PULLDOWN);
|
||||
is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_CS_PULLDOWN, IS31FL3737_CS_PULLDOWN);
|
||||
// Set global current to maximum.
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_GLOBALCURRENT, IS31FL3737_GLOBALCURRENT);
|
||||
is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3737_GLOBAL_CURRENT);
|
||||
// Disable software shutdown.
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_CONFIGURATION, ((IS31FL3737_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_CONFIGURATION, ((IS31FL3737_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
|
||||
// Wait 10ms to ensure the device has woken up.
|
||||
wait_ms(10);
|
||||
|
@ -231,8 +215,8 @@ void is31fl3737_set_led_control_register(uint8_t index, bool value) {
|
|||
void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG1
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_PWM);
|
||||
|
||||
is31fl3737_write_pwm_buffer(addr, g_pwm_buffer[index]);
|
||||
g_pwm_buffer_update_required[index] = false;
|
||||
|
@ -242,8 +226,8 @@ void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
|||
void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG0
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3737_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
|
|
@ -41,7 +41,7 @@
|
|||
# define IS31FL3737_CS_PULLDOWN ISSI_CSPULLUP
|
||||
#endif
|
||||
#ifdef ISSI_GLOBALCURRENT
|
||||
# define IS31FL3737_GLOBALCURRENT ISSI_GLOBALCURRENT
|
||||
# define IS31FL3737_GLOBAL_CURRENT ISSI_GLOBALCURRENT
|
||||
#endif
|
||||
|
||||
#define PUR_0R IS31FL3737_PUR_0_OHM
|
||||
|
@ -54,6 +54,25 @@
|
|||
#define PUR_32KR IS31FL3737_PUR_32K_OHM
|
||||
// ========
|
||||
|
||||
#define IS31FL3737_REG_INTERRUPT_MASK 0xF0
|
||||
#define IS31FL3737_REG_INTERRUPT_STATUS 0xF1
|
||||
|
||||
#define IS31FL3737_REG_COMMAND 0xFD
|
||||
|
||||
#define IS31FL3737_COMMAND_LED_CONTROL 0x00
|
||||
#define IS31FL3737_COMMAND_PWM 0x01
|
||||
#define IS31FL3737_COMMAND_AUTO_BREATH 0x02
|
||||
#define IS31FL3737_COMMAND_FUNCTION 0x03
|
||||
|
||||
#define IS31FL3737_FUNCTION_REG_CONFIGURATION 0x00
|
||||
#define IS31FL3737_FUNCTION_REG_GLOBAL_CURRENT 0x01
|
||||
#define IS31FL3737_FUNCTION_REG_SW_PULLUP 0x0F
|
||||
#define IS31FL3737_FUNCTION_REG_CS_PULLDOWN 0x10
|
||||
#define IS31FL3737_FUNCTION_REG_RESET 0x11
|
||||
|
||||
#define IS31FL3737_REG_COMMAND_WRITE_LOCK 0xFE
|
||||
#define IS31FL3737_COMMAND_WRITE_LOCK_MAGIC 0xC5
|
||||
|
||||
#define IS31FL3737_I2C_ADDRESS_GND 0x50
|
||||
#define IS31FL3737_I2C_ADDRESS_SCL 0x55
|
||||
#define IS31FL3737_I2C_ADDRESS_SDA 0x5A
|
||||
|
|
|
@ -22,22 +22,6 @@
|
|||
#include "i2c_master.h"
|
||||
#include "wait.h"
|
||||
|
||||
#define IS31FL3737_COMMANDREGISTER 0xFD
|
||||
#define IS31FL3737_COMMANDREGISTER_WRITELOCK 0xFE
|
||||
#define IS31FL3737_INTERRUPTMASKREGISTER 0xF0
|
||||
#define IS31FL3737_INTERRUPTSTATUSREGISTER 0xF1
|
||||
|
||||
#define IS31FL3737_PAGE_LEDCONTROL 0x00 // PG0
|
||||
#define IS31FL3737_PAGE_PWM 0x01 // PG1
|
||||
#define IS31FL3737_PAGE_AUTOBREATH 0x02 // PG2
|
||||
#define IS31FL3737_PAGE_FUNCTION 0x03 // PG3
|
||||
|
||||
#define IS31FL3737_REG_CONFIGURATION 0x00 // PG3
|
||||
#define IS31FL3737_REG_GLOBALCURRENT 0x01 // PG3
|
||||
#define IS31FL3737_REG_RESET 0x11 // PG3
|
||||
#define IS31FL3737_REG_SW_PULLUP 0x0F // PG3
|
||||
#define IS31FL3737_REG_CS_PULLDOWN 0x10 // PG3
|
||||
|
||||
#define IS31FL3737_PWM_REGISTER_COUNT 192 // actually 144
|
||||
#define IS31FL3737_LED_CONTROL_REGISTER_COUNT 24
|
||||
|
||||
|
@ -61,8 +45,8 @@
|
|||
# define IS31FL3737_CS_PULLDOWN IS31FL3737_PDR_0_OHM
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3737_GLOBALCURRENT
|
||||
# define IS31FL3737_GLOBALCURRENT 0xFF
|
||||
#ifndef IS31FL3737_GLOBAL_CURRENT
|
||||
# define IS31FL3737_GLOBAL_CURRENT 0xFF
|
||||
#endif
|
||||
|
||||
// Transfer buffer for TWITransmitData()
|
||||
|
@ -155,20 +139,20 @@ void is31fl3737_init(uint8_t addr) {
|
|||
// then disable software shutdown.
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG0
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_LED_CONTROL);
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3737_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG1
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_PWM);
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) {
|
||||
|
@ -176,18 +160,18 @@ void is31fl3737_init(uint8_t addr) {
|
|||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG3
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_FUNCTION);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_FUNCTION);
|
||||
// Set de-ghost pull-up resistors (SWx)
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_SW_PULLUP, IS31FL3737_SW_PULLUP);
|
||||
is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_SW_PULLUP, IS31FL3737_SW_PULLUP);
|
||||
// Set de-ghost pull-down resistors (CSx)
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_CS_PULLDOWN, IS31FL3737_CS_PULLDOWN);
|
||||
is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_CS_PULLDOWN, IS31FL3737_CS_PULLDOWN);
|
||||
// Set global current to maximum.
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_GLOBALCURRENT, IS31FL3737_GLOBALCURRENT);
|
||||
is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3737_GLOBAL_CURRENT);
|
||||
// Disable software shutdown.
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_CONFIGURATION, ((IS31FL3737_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
is31fl3737_write_register(addr, IS31FL3737_FUNCTION_REG_CONFIGURATION, ((IS31FL3737_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
|
||||
// Wait 10ms to ensure the device has woken up.
|
||||
wait_ms(10);
|
||||
|
@ -247,8 +231,8 @@ void is31fl3737_set_led_control_register(uint8_t index, bool red, bool green, bo
|
|||
void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG1
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_PWM);
|
||||
|
||||
is31fl3737_write_pwm_buffer(addr, g_pwm_buffer[index]);
|
||||
g_pwm_buffer_update_required[index] = false;
|
||||
|
@ -258,8 +242,8 @@ void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
|||
void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG0
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND_WRITE_LOCK, IS31FL3737_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3737_write_register(addr, IS31FL3737_REG_COMMAND, IS31FL3737_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3737_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
|
|
@ -53,7 +53,7 @@
|
|||
# define IS31FL3737_CS_PULLDOWN ISSI_CSPULLUP
|
||||
#endif
|
||||
#ifdef ISSI_GLOBALCURRENT
|
||||
# define IS31FL3737_GLOBALCURRENT ISSI_GLOBALCURRENT
|
||||
# define IS31FL3737_GLOBAL_CURRENT ISSI_GLOBALCURRENT
|
||||
#endif
|
||||
|
||||
#define is31_led is31fl3737_led_t
|
||||
|
@ -69,6 +69,25 @@
|
|||
#define PUR_32KR IS31FL3737_PUR_32K_OHM
|
||||
// ========
|
||||
|
||||
#define IS31FL3737_REG_INTERRUPT_MASK 0xF0
|
||||
#define IS31FL3737_REG_INTERRUPT_STATUS 0xF1
|
||||
|
||||
#define IS31FL3737_REG_COMMAND 0xFD
|
||||
|
||||
#define IS31FL3737_COMMAND_LED_CONTROL 0x00
|
||||
#define IS31FL3737_COMMAND_PWM 0x01
|
||||
#define IS31FL3737_COMMAND_AUTO_BREATH 0x02
|
||||
#define IS31FL3737_COMMAND_FUNCTION 0x03
|
||||
|
||||
#define IS31FL3737_FUNCTION_REG_CONFIGURATION 0x00
|
||||
#define IS31FL3737_FUNCTION_REG_GLOBAL_CURRENT 0x01
|
||||
#define IS31FL3737_FUNCTION_REG_SW_PULLUP 0x0F
|
||||
#define IS31FL3737_FUNCTION_REG_CS_PULLDOWN 0x10
|
||||
#define IS31FL3737_FUNCTION_REG_RESET 0x11
|
||||
|
||||
#define IS31FL3737_REG_COMMAND_WRITE_LOCK 0xFE
|
||||
#define IS31FL3737_COMMAND_WRITE_LOCK_MAGIC 0xC5
|
||||
|
||||
#define IS31FL3737_I2C_ADDRESS_GND 0x50
|
||||
#define IS31FL3737_I2C_ADDRESS_SCL 0x55
|
||||
#define IS31FL3737_I2C_ADDRESS_SDA 0x5A
|
||||
|
|
|
@ -22,24 +22,6 @@
|
|||
#include "i2c_master.h"
|
||||
#include "wait.h"
|
||||
|
||||
#define IS31FL3741_COMMANDREGISTER 0xFD
|
||||
#define IS31FL3741_COMMANDREGISTER_WRITELOCK 0xFE
|
||||
#define IS31FL3741_INTERRUPTMASKREGISTER 0xF0
|
||||
#define IS31FL3741_INTERRUPTSTATUSREGISTER 0xF1
|
||||
#define IS31FL3741_IDREGISTER 0xFC
|
||||
|
||||
#define IS31FL3741_PAGE_PWM0 0x00 // PG0
|
||||
#define IS31FL3741_PAGE_PWM1 0x01 // PG1
|
||||
#define IS31FL3741_PAGE_SCALING_0 0x02 // PG2
|
||||
#define IS31FL3741_PAGE_SCALING_1 0x03 // PG3
|
||||
#define IS31FL3741_PAGE_FUNCTION 0x04 // PG4
|
||||
|
||||
#define IS31FL3741_REG_CONFIGURATION 0x00 // PG4
|
||||
#define IS31FL3741_REG_GLOBALCURRENT 0x01 // PG4
|
||||
#define IS31FL3741_REG_PULLDOWNUP 0x02 // PG4
|
||||
#define IS31FL3741_REG_PWM_FREQUENCY 0x36 // PG4
|
||||
#define IS31FL3741_REG_RESET 0x3F // PG4
|
||||
|
||||
#define IS31FL3741_PWM_REGISTER_COUNT 351
|
||||
|
||||
#ifndef IS31FL3741_I2C_TIMEOUT
|
||||
|
@ -66,8 +48,8 @@
|
|||
# define IS31FL3741_CS_PULLDOWN IS31FL3741_PDR_32K_OHM
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3741_GLOBALCURRENT
|
||||
# define IS31FL3741_GLOBALCURRENT 0xFF
|
||||
#ifndef IS31FL3741_GLOBAL_CURRENT
|
||||
# define IS31FL3741_GLOBAL_CURRENT 0xFF
|
||||
#endif
|
||||
|
||||
// Transfer buffer for TWITransmitData()
|
||||
|
@ -104,8 +86,8 @@ bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
|
|||
for (int i = 0; i < 342; i += 18) {
|
||||
if (i == 180) {
|
||||
// unlock the command register and select PG1
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM1);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_PWM_1);
|
||||
}
|
||||
|
||||
g_twi_transfer_buffer[0] = i % 180;
|
||||
|
@ -181,20 +163,20 @@ void is31fl3741_init(uint8_t addr) {
|
|||
// Unlock the command register.
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG4
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_FUNCTION);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_FUNCTION);
|
||||
|
||||
// Set to Normal operation
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_CONFIGURATION, IS31FL3741_CONFIGURATION);
|
||||
is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_CONFIGURATION, IS31FL3741_CONFIGURATION);
|
||||
|
||||
// Set Golbal Current Control Register
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_GLOBALCURRENT, IS31FL3741_GLOBALCURRENT);
|
||||
is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3741_GLOBAL_CURRENT);
|
||||
// Set Pull up & Down for SWx CSy
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_PULLDOWNUP, ((IS31FL3741_CS_PULLDOWN << 4) | IS31FL3741_SW_PULLUP));
|
||||
is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_PULLDOWNUP, ((IS31FL3741_CS_PULLDOWN << 4) | IS31FL3741_SW_PULLUP));
|
||||
// Set PWM frequency
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_PWM_FREQUENCY, (IS31FL3741_PWM_FREQUENCY & 0b1111));
|
||||
is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_PWM_FREQUENCY, (IS31FL3741_PWM_FREQUENCY & 0b1111));
|
||||
|
||||
// is31fl3741_update_led_scaling_registers(addr, 0xFF, 0xFF, 0xFF);
|
||||
|
||||
|
@ -237,8 +219,8 @@ void is31fl3741_set_led_control_register(uint8_t index, bool value) {
|
|||
void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
// unlock the command register and select PG2
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM0);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_PWM_0);
|
||||
|
||||
is31fl3741_write_pwm_buffer(addr, g_pwm_buffer[index]);
|
||||
}
|
||||
|
@ -255,8 +237,8 @@ void is31fl3741_set_pwm_buffer(const is31fl3741_led_t *pled, uint8_t value) {
|
|||
void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_scaling_registers_update_required[index]) {
|
||||
// unlock the command register and select PG2
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_0);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_SCALING_0);
|
||||
|
||||
// CS1_SW1 to CS30_SW6 are on PG2
|
||||
for (int i = CS1_SW1; i <= CS30_SW6; ++i) {
|
||||
|
@ -264,8 +246,8 @@ void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) {
|
|||
}
|
||||
|
||||
// unlock the command register and select PG3
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_1);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_SCALING_1);
|
||||
|
||||
// CS1_SW7 to CS39_SW9 are on PG3
|
||||
for (int i = CS1_SW7; i <= CS39_SW9; ++i) {
|
||||
|
|
|
@ -41,7 +41,7 @@
|
|||
# define IS31FL3741_CS_PULLDOWN ISSI_CSPULLUP
|
||||
#endif
|
||||
#ifdef ISSI_GLOBALCURRENT
|
||||
# define IS31FL3741_GLOBALCURRENT ISSI_GLOBALCURRENT
|
||||
# define IS31FL3741_GLOBAL_CURRENT ISSI_GLOBALCURRENT
|
||||
#endif
|
||||
|
||||
#define PUR_0R IS31FL3741_PUR_0_OHM
|
||||
|
@ -54,6 +54,27 @@
|
|||
#define PUR_32KR IS31FL3741_PUR_32K_OHM
|
||||
// ========
|
||||
|
||||
#define IS31FL3741_REG_INTERRUPT_MASK 0xF0
|
||||
#define IS31FL3741_REG_INTERRUPT_STATUS 0xF1
|
||||
#define IS31FL3741_REG_ID 0xFC
|
||||
|
||||
#define IS31FL3741_REG_COMMAND 0xFD
|
||||
|
||||
#define IS31FL3741_COMMAND_PWM_0 0x00
|
||||
#define IS31FL3741_COMMAND_PWM_1 0x01
|
||||
#define IS31FL3741_COMMAND_SCALING_0 0x02
|
||||
#define IS31FL3741_COMMAND_SCALING_1 0x03
|
||||
#define IS31FL3741_COMMAND_FUNCTION 0x04
|
||||
|
||||
#define IS31FL3741_FUNCTION_REG_CONFIGURATION 0x00
|
||||
#define IS31FL3741_FUNCTION_REG_GLOBAL_CURRENT 0x01
|
||||
#define IS31FL3741_FUNCTION_REG_PULLDOWNUP 0x02
|
||||
#define IS31FL3741_FUNCTION_REG_PWM_FREQUENCY 0x36
|
||||
#define IS31FL3741_FUNCTION_REG_RESET 0x3F
|
||||
|
||||
#define IS31FL3741_REG_COMMAND_WRITE_LOCK 0xFE
|
||||
#define IS31FL3741_COMMAND_WRITE_LOCK_MAGIC 0xC5
|
||||
|
||||
#define IS31FL3741_I2C_ADDRESS_GND 0x30
|
||||
#define IS31FL3741_I2C_ADDRESS_SCL 0x31
|
||||
#define IS31FL3741_I2C_ADDRESS_SDA 0x32
|
||||
|
|
|
@ -22,24 +22,6 @@
|
|||
#include "i2c_master.h"
|
||||
#include "wait.h"
|
||||
|
||||
#define IS31FL3741_COMMANDREGISTER 0xFD
|
||||
#define IS31FL3741_COMMANDREGISTER_WRITELOCK 0xFE
|
||||
#define IS31FL3741_INTERRUPTMASKREGISTER 0xF0
|
||||
#define IS31FL3741_INTERRUPTSTATUSREGISTER 0xF1
|
||||
#define IS31FL3741_IDREGISTER 0xFC
|
||||
|
||||
#define IS31FL3741_PAGE_PWM0 0x00 // PG0
|
||||
#define IS31FL3741_PAGE_PWM1 0x01 // PG1
|
||||
#define IS31FL3741_PAGE_SCALING_0 0x02 // PG2
|
||||
#define IS31FL3741_PAGE_SCALING_1 0x03 // PG3
|
||||
#define IS31FL3741_PAGE_FUNCTION 0x04 // PG4
|
||||
|
||||
#define IS31FL3741_REG_CONFIGURATION 0x00 // PG4
|
||||
#define IS31FL3741_REG_GLOBALCURRENT 0x01 // PG4
|
||||
#define IS31FL3741_REG_PULLDOWNUP 0x02 // PG4
|
||||
#define IS31FL3741_REG_PWM_FREQUENCY 0x36 // PG4
|
||||
#define IS31FL3741_REG_RESET 0x3F // PG4
|
||||
|
||||
#define IS31FL3741_PWM_REGISTER_COUNT 351
|
||||
|
||||
#ifndef IS31FL3741_I2C_TIMEOUT
|
||||
|
@ -66,8 +48,8 @@
|
|||
# define IS31FL3741_CS_PULLDOWN IS31FL3741_PDR_32K_OHM
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3741_GLOBALCURRENT
|
||||
# define IS31FL3741_GLOBALCURRENT 0xFF
|
||||
#ifndef IS31FL3741_GLOBAL_CURRENT
|
||||
# define IS31FL3741_GLOBAL_CURRENT 0xFF
|
||||
#endif
|
||||
|
||||
// Transfer buffer for TWITransmitData()
|
||||
|
@ -104,8 +86,8 @@ bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
|
|||
for (int i = 0; i < 342; i += 18) {
|
||||
if (i == 180) {
|
||||
// unlock the command register and select PG1
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM1);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_PWM_1);
|
||||
}
|
||||
|
||||
g_twi_transfer_buffer[0] = i % 180;
|
||||
|
@ -181,20 +163,20 @@ void is31fl3741_init(uint8_t addr) {
|
|||
// Unlock the command register.
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG4
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_FUNCTION);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_FUNCTION);
|
||||
|
||||
// Set to Normal operation
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_CONFIGURATION, IS31FL3741_CONFIGURATION);
|
||||
is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_CONFIGURATION, IS31FL3741_CONFIGURATION);
|
||||
|
||||
// Set Golbal Current Control Register
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_GLOBALCURRENT, IS31FL3741_GLOBALCURRENT);
|
||||
is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3741_GLOBAL_CURRENT);
|
||||
// Set Pull up & Down for SWx CSy
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_PULLDOWNUP, ((IS31FL3741_CS_PULLDOWN << 4) | IS31FL3741_SW_PULLUP));
|
||||
is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_PULLDOWNUP, ((IS31FL3741_CS_PULLDOWN << 4) | IS31FL3741_SW_PULLUP));
|
||||
// Set PWM frequency
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_PWM_FREQUENCY, (IS31FL3741_PWM_FREQUENCY & 0b1111));
|
||||
is31fl3741_write_register(addr, IS31FL3741_FUNCTION_REG_PWM_FREQUENCY, (IS31FL3741_PWM_FREQUENCY & 0b1111));
|
||||
|
||||
// is31fl3741_update_led_scaling_registers(addr, 0xFF, 0xFF, 0xFF);
|
||||
|
||||
|
@ -251,8 +233,8 @@ void is31fl3741_set_led_control_register(uint8_t index, bool red, bool green, bo
|
|||
void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
// unlock the command register and select PG2
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM0);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_PWM_0);
|
||||
|
||||
is31fl3741_write_pwm_buffer(addr, g_pwm_buffer[index]);
|
||||
}
|
||||
|
@ -271,8 +253,8 @@ void is31fl3741_set_pwm_buffer(const is31fl3741_led_t *pled, uint8_t red, uint8_
|
|||
void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_scaling_registers_update_required[index]) {
|
||||
// unlock the command register and select PG2
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_0);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_SCALING_0);
|
||||
|
||||
// CS1_SW1 to CS30_SW6 are on PG2
|
||||
for (int i = CS1_SW1; i <= CS30_SW6; ++i) {
|
||||
|
@ -280,8 +262,8 @@ void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) {
|
|||
}
|
||||
|
||||
// unlock the command register and select PG3
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_1);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND_WRITE_LOCK, IS31FL3741_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3741_write_register(addr, IS31FL3741_REG_COMMAND, IS31FL3741_COMMAND_SCALING_1);
|
||||
|
||||
// CS1_SW7 to CS39_SW9 are on PG3
|
||||
for (int i = CS1_SW7; i <= CS39_SW9; ++i) {
|
||||
|
|
|
@ -53,7 +53,7 @@
|
|||
# define IS31FL3741_CS_PULLDOWN ISSI_CSPULLUP
|
||||
#endif
|
||||
#ifdef ISSI_GLOBALCURRENT
|
||||
# define IS31FL3741_GLOBALCURRENT ISSI_GLOBALCURRENT
|
||||
# define IS31FL3741_GLOBAL_CURRENT ISSI_GLOBALCURRENT
|
||||
#endif
|
||||
|
||||
#define is31_led is31fl3741_led_t
|
||||
|
@ -69,6 +69,27 @@
|
|||
#define PUR_32KR IS31FL3741_PUR_32K_OHM
|
||||
// ========
|
||||
|
||||
#define IS31FL3741_REG_INTERRUPT_MASK 0xF0
|
||||
#define IS31FL3741_REG_INTERRUPT_STATUS 0xF1
|
||||
#define IS31FL3741_REG_ID 0xFC
|
||||
|
||||
#define IS31FL3741_REG_COMMAND 0xFD
|
||||
|
||||
#define IS31FL3741_COMMAND_PWM_0 0x00
|
||||
#define IS31FL3741_COMMAND_PWM_1 0x01
|
||||
#define IS31FL3741_COMMAND_SCALING_0 0x02
|
||||
#define IS31FL3741_COMMAND_SCALING_1 0x03
|
||||
#define IS31FL3741_COMMAND_FUNCTION 0x04
|
||||
|
||||
#define IS31FL3741_FUNCTION_REG_CONFIGURATION 0x00
|
||||
#define IS31FL3741_FUNCTION_REG_GLOBAL_CURRENT 0x01
|
||||
#define IS31FL3741_FUNCTION_REG_PULLDOWNUP 0x02
|
||||
#define IS31FL3741_FUNCTION_REG_PWM_FREQUENCY 0x36
|
||||
#define IS31FL3741_FUNCTION_REG_RESET 0x3F
|
||||
|
||||
#define IS31FL3741_REG_COMMAND_WRITE_LOCK 0xFE
|
||||
#define IS31FL3741_COMMAND_WRITE_LOCK_MAGIC 0xC5
|
||||
|
||||
#define IS31FL3741_I2C_ADDRESS_GND 0x30
|
||||
#define IS31FL3741_I2C_ADDRESS_SCL 0x31
|
||||
#define IS31FL3741_I2C_ADDRESS_SDA 0x32
|
||||
|
|
|
@ -29,7 +29,7 @@
|
|||
#endif
|
||||
|
||||
#ifndef SNLED27351_PHASE_CHANNEL
|
||||
# define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_12CHANNEL
|
||||
# define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_12_CHANNEL
|
||||
#endif
|
||||
|
||||
#ifndef SNLED27351_CURRENT_TUNE
|
||||
|
@ -134,48 +134,48 @@ void snled27351_init_drivers(void) {
|
|||
|
||||
void snled27351_init(uint8_t addr) {
|
||||
// Select to function page
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
|
||||
// Setting LED driver to shutdown mode
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN);
|
||||
// Setting internal channel pulldown/pullup
|
||||
snled27351_write_register(addr, SNLED27351_REG_PDU, SNLED27351_MSKSET_CA_CB_CHANNEL);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_PULLDOWNUP, SNLED27351_PULLDOWNUP_ALL_ENABLED);
|
||||
// Select number of scan phase
|
||||
snled27351_write_register(addr, SNLED27351_REG_SCAN_PHASE, SNLED27351_PHASE_CHANNEL);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SCAN_PHASE, SNLED27351_PHASE_CHANNEL);
|
||||
// Setting PWM Delay Phase
|
||||
snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE1, SNLED27351_MSKPWM_DELAY_PHASE_ENABLE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_1, SNLED27351_SLEW_RATE_CONTROL_MODE_1_PDP_ENABLE);
|
||||
// Setting Driving/Sinking Channel Slew Rate
|
||||
snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE2, SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_2, SNLED27351_SLEW_RATE_CONTROL_MODE_2_DSL_ENABLE | SNLED27351_SLEW_RATE_CONTROL_MODE_2_SSL_ENABLE);
|
||||
// Setting Iref
|
||||
snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_DISABLE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP, 0);
|
||||
// Set LED CONTROL PAGE (Page 0)
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) {
|
||||
snled27351_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Set PWM PAGE (Page 1)
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_PWM);
|
||||
for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) {
|
||||
snled27351_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Set CURRENT PAGE (Page 4)
|
||||
uint8_t current_tune_reg_list[SNLED27351_LED_CURRENT_TUNE_LENGTH] = SNLED27351_CURRENT_TUNE;
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_CURRENT_TUNE_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_CURRENT_TUNE);
|
||||
for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) {
|
||||
snled27351_write_register(addr, i, current_tune_reg_list[i]);
|
||||
}
|
||||
|
||||
// Enable LEDs ON/OFF
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) {
|
||||
snled27351_write_register(addr, i, 0xFF);
|
||||
}
|
||||
|
||||
// Select to function page
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
|
||||
// Setting LED driver to normal mode
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL);
|
||||
}
|
||||
|
||||
void snled27351_set_value(int index, uint8_t value) {
|
||||
|
@ -215,7 +215,7 @@ void snled27351_set_led_control_register(uint8_t index, bool value) {
|
|||
|
||||
void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_PWM);
|
||||
|
||||
// If any of the transactions fail we risk writing dirty PG0,
|
||||
// refresh page 0 just in case.
|
||||
|
@ -228,7 +228,7 @@ void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
|||
|
||||
void snled27351_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
snled27351_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
@ -251,16 +251,16 @@ void snled27351_flush(void) {
|
|||
|
||||
void snled27351_sw_return_normal(uint8_t addr) {
|
||||
// Select to function page
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
|
||||
// Setting LED driver to normal mode
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL);
|
||||
}
|
||||
|
||||
void snled27351_sw_shutdown(uint8_t addr) {
|
||||
// Select to function page
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
|
||||
// Setting LED driver to shutdown mode
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN);
|
||||
// Write SW Sleep Register
|
||||
snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_ENABLE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP, SNLED27351_SOFTWARE_SLEEP_ENABLE);
|
||||
}
|
||||
|
|
|
@ -35,23 +35,98 @@
|
|||
# define SNLED27351_CURRENT_TUNE CKLED2001_CURRENT_TUNE
|
||||
#endif
|
||||
|
||||
#define MSKPHASE_12CHANNEL SNLED27351_MSKPHASE_12CHANNEL
|
||||
#define MSKPHASE_11CHANNEL SNLED27351_MSKPHASE_11CHANNEL
|
||||
#define MSKPHASE_10CHANNEL SNLED27351_MSKPHASE_10CHANNEL
|
||||
#define MSKPHASE_9CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define MSKPHASE_8CHANNEL SNLED27351_MSKPHASE_8CHANNEL
|
||||
#define MSKPHASE_7CHANNEL SNLED27351_MSKPHASE_7CHANNEL
|
||||
#define MSKPHASE_6CHANNEL SNLED27351_MSKPHASE_6CHANNEL
|
||||
#define MSKPHASE_5CHANNEL SNLED27351_MSKPHASE_5CHANNEL
|
||||
#define MSKPHASE_4CHANNEL SNLED27351_MSKPHASE_4CHANNEL
|
||||
#define MSKPHASE_3CHANNEL SNLED27351_MSKPHASE_3CHANNEL
|
||||
#define MSKPHASE_2CHANNEL SNLED27351_MSKPHASE_2CHANNEL
|
||||
#define MSKPHASE_1CHANNEL SNLED27351_MSKPHASE_1CHANNEL
|
||||
#define MSKPHASE_12CHANNEL SNLED27351_SCAN_PHASE_12_CHANNEL
|
||||
#define MSKPHASE_11CHANNEL SNLED27351_SCAN_PHASE_11_CHANNEL
|
||||
#define MSKPHASE_10CHANNEL SNLED27351_SCAN_PHASE_10_CHANNEL
|
||||
#define MSKPHASE_9CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
#define MSKPHASE_8CHANNEL SNLED27351_SCAN_PHASE_8_CHANNEL
|
||||
#define MSKPHASE_7CHANNEL SNLED27351_SCAN_PHASE_7_CHANNEL
|
||||
#define MSKPHASE_6CHANNEL SNLED27351_SCAN_PHASE_6_CHANNEL
|
||||
#define MSKPHASE_5CHANNEL SNLED27351_SCAN_PHASE_5_CHANNEL
|
||||
#define MSKPHASE_4CHANNEL SNLED27351_SCAN_PHASE_4_CHANNEL
|
||||
#define MSKPHASE_3CHANNEL SNLED27351_SCAN_PHASE_3_CHANNEL
|
||||
#define MSKPHASE_2CHANNEL SNLED27351_SCAN_PHASE_2_CHANNEL
|
||||
#define MSKPHASE_1CHANNEL SNLED27351_SCAN_PHASE_1_CHANNEL
|
||||
|
||||
#define ckled2001_led snled27351_led_t
|
||||
#define g_ckled2001_leds g_snled27351_leds
|
||||
// ========
|
||||
|
||||
#define SNLED27351_REG_COMMAND 0xFD
|
||||
#define SNLED27351_COMMAND_LED_CONTROL 0x00
|
||||
#define SNLED27351_COMMAND_PWM 0x01
|
||||
#define SNLED27351_COMMAND_FUNCTION 0x03
|
||||
#define SNLED27351_COMMAND_CURRENT_TUNE 0x04
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN 0x00
|
||||
#define SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN (0x0 << 0)
|
||||
#define SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL (0x1 << 0)
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_ID 0x11
|
||||
#define SNLED27351_DRIVER_ID 0x8A
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_PULLDOWNUP 0x13
|
||||
#define SNLED27351_PULLDOWNUP_ALL_ENABLED 0xAA
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_SCAN_PHASE 0x14
|
||||
#define SNLED27351_SCAN_PHASE_12_CHANNEL 0x00
|
||||
#define SNLED27351_SCAN_PHASE_11_CHANNEL 0x01
|
||||
#define SNLED27351_SCAN_PHASE_10_CHANNEL 0x02
|
||||
#define SNLED27351_SCAN_PHASE_9_CHANNEL 0x03
|
||||
#define SNLED27351_SCAN_PHASE_8_CHANNEL 0x04
|
||||
#define SNLED27351_SCAN_PHASE_7_CHANNEL 0x05
|
||||
#define SNLED27351_SCAN_PHASE_6_CHANNEL 0x06
|
||||
#define SNLED27351_SCAN_PHASE_5_CHANNEL 0x07
|
||||
#define SNLED27351_SCAN_PHASE_4_CHANNEL 0x08
|
||||
#define SNLED27351_SCAN_PHASE_3_CHANNEL 0x09
|
||||
#define SNLED27351_SCAN_PHASE_2_CHANNEL 0x0A
|
||||
#define SNLED27351_SCAN_PHASE_1_CHANNEL 0x0B
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_1 0x15
|
||||
#define SNLED27351_SLEW_RATE_CONTROL_MODE_1_PDP_ENABLE (0b1 << 2)
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_2 0x16
|
||||
#define SNLED27351_SLEW_RATE_CONTROL_MODE_2_SSL_ENABLE (0b1 << 6)
|
||||
#define SNLED27351_SLEW_RATE_CONTROL_MODE_2_DSL_ENABLE (0b1 << 7)
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_OPEN_SHORT_ENABLE 0x17
|
||||
#define SNLED27351_OPEN_SHORT_ENABLE_SDS_ENABLE (0b1 << 6)
|
||||
#define SNLED27351_OPEN_SHORT_ENABLE_ODS_ENABLE (0b1 << 7)
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_OPEN_SHORT_DUTY 0x18
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_OPEN_SHORT_FLAG 0x19
|
||||
#define SNLED27351_OPEN_SHORT_FLAG_OSINT_ENABLE (0b1 << 6)
|
||||
#define SNLED27351_OPEN_SHORT_FLAG_ODINT_ENABLE (0b1 << 7)
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP 0x1A
|
||||
#define SNLED27351_SOFTWARE_SLEEP_ENABLE (0b1 << 1)
|
||||
|
||||
// LED Control Registers
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR 0x17
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_LENGTH ((SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR - SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR 0x18
|
||||
#define SNLED27351_LED_CONTROL_OPEN_LAST_ADDR 0x2F
|
||||
#define SNLED27351_LED_CONTROL_OPEN_LENGTH ((SNLED27351_LED_CONTROL_OPEN_LAST_ADDR - SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR 0x30
|
||||
#define SNLED27351_LED_CONTROL_SHORT_LAST_ADDR 0x47
|
||||
#define SNLED27351_LED_CONTROL_SHORT_LENGTH ((SNLED27351_LED_CONTROL_SHORT_LAST_ADDR - SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_PAGE_LENGTH 0x48
|
||||
|
||||
// LED Control Registers
|
||||
#define SNLED27351_LED_PWM_FIRST_ADDR 0x00
|
||||
#define SNLED27351_LED_PWM_LAST_ADDR 0xBF
|
||||
#define SNLED27351_LED_PWM_LENGTH 0xC0
|
||||
|
||||
// Current Tune Registers
|
||||
#define SNLED27351_LED_CURRENT_TUNE_FIRST_ADDR 0x00
|
||||
#define SNLED27351_LED_CURRENT_TUNE_LAST_ADDR 0x0B
|
||||
#define SNLED27351_LED_CURRENT_TUNE_LENGTH 0x0C
|
||||
|
||||
#define SNLED27351_I2C_ADDRESS_GND 0x74
|
||||
#define SNLED27351_I2C_ADDRESS_SCL 0x75
|
||||
#define SNLED27351_I2C_ADDRESS_SDA 0x76
|
||||
|
@ -100,92 +175,6 @@ void snled27351_flush(void);
|
|||
void snled27351_sw_return_normal(uint8_t addr);
|
||||
void snled27351_sw_shutdown(uint8_t addr);
|
||||
|
||||
// Registers Page Define
|
||||
#define SNLED27351_REG_CONFIGURE_CMD_PAGE 0xFD
|
||||
#define SNLED27351_LED_CONTROL_PAGE 0x00
|
||||
#define SNLED27351_LED_PWM_PAGE 0x01
|
||||
#define SNLED27351_FUNCTION_PAGE 0x03
|
||||
#define SNLED27351_CURRENT_TUNE_PAGE 0x04
|
||||
|
||||
// Function Register: address 0x00
|
||||
#define SNLED27351_REG_CONFIGURATION 0x00
|
||||
#define SNLED27351_MSKSW_SHUT_DOWN_MODE (0x0 << 0)
|
||||
#define SNLED27351_MSKSW_NORMAL_MODE (0x1 << 0)
|
||||
|
||||
#define SNLED27351_REG_DRIVER_ID 0x11
|
||||
#define SNLED27351_DRIVER_ID 0x8A
|
||||
|
||||
#define SNLED27351_REG_PDU 0x13
|
||||
#define SNLED27351_MSKSET_CA_CB_CHANNEL 0xAA
|
||||
#define SNLED27351_MSKCLR_CA_CB_CHANNEL 0x00
|
||||
|
||||
#define SNLED27351_REG_SCAN_PHASE 0x14
|
||||
#define SNLED27351_MSKPHASE_12CHANNEL 0x00
|
||||
#define SNLED27351_MSKPHASE_11CHANNEL 0x01
|
||||
#define SNLED27351_MSKPHASE_10CHANNEL 0x02
|
||||
#define SNLED27351_MSKPHASE_9CHANNEL 0x03
|
||||
#define SNLED27351_MSKPHASE_8CHANNEL 0x04
|
||||
#define SNLED27351_MSKPHASE_7CHANNEL 0x05
|
||||
#define SNLED27351_MSKPHASE_6CHANNEL 0x06
|
||||
#define SNLED27351_MSKPHASE_5CHANNEL 0x07
|
||||
#define SNLED27351_MSKPHASE_4CHANNEL 0x08
|
||||
#define SNLED27351_MSKPHASE_3CHANNEL 0x09
|
||||
#define SNLED27351_MSKPHASE_2CHANNEL 0x0A
|
||||
#define SNLED27351_MSKPHASE_1CHANNEL 0x0B
|
||||
|
||||
#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE1 0x15
|
||||
#define SNLED27351_MSKPWM_DELAY_PHASE_ENABLE 0x04
|
||||
#define SNLED27351_MSKPWM_DELAY_PHASE_DISABLE 0x00
|
||||
|
||||
#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE2 0x16
|
||||
#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE 0xC0
|
||||
#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_DISABLE 0x00
|
||||
|
||||
#define SNLED27351_REG_OPEN_SHORT_ENABLE 0x17
|
||||
#define SNLED27351_MSKOPEN_DETECTION_ENABLE (0x01 << 7)
|
||||
#define SNLED27351_MSKOPEN_DETECTION_DISABLE (0x00)
|
||||
|
||||
#define SNLED27351_MSKSHORT_DETECTION_ENABLE (0x01 << 6)
|
||||
#define SNLED27351_MSKSHORT_DETECTION_DISABLE (0x00)
|
||||
|
||||
#define SNLED27351_REG_OPEN_SHORT_DUTY 0x18
|
||||
#define SNLED27351_REG_OPEN_SHORT_FLAG 0x19
|
||||
|
||||
#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7)
|
||||
#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00)
|
||||
|
||||
#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6)
|
||||
#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00)
|
||||
|
||||
#define SNLED27351_REG_SOFTWARE_SLEEP 0x1A
|
||||
#define SNLED27351_MSKSLEEP_ENABLE 0x02
|
||||
#define SNLED27351_MSKSLEEP_DISABLE 0x00
|
||||
|
||||
// LED Control Registers
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR 0x17
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_LENGTH ((SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR - SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR 0x18
|
||||
#define SNLED27351_LED_CONTROL_OPEN_LAST_ADDR 0x2F
|
||||
#define SNLED27351_LED_CONTROL_OPEN_LENGTH ((SNLED27351_LED_CONTROL_OPEN_LAST_ADDR - SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR 0x30
|
||||
#define SNLED27351_LED_CONTROL_SHORT_LAST_ADDR 0x47
|
||||
#define SNLED27351_LED_CONTROL_SHORT_LENGTH ((SNLED27351_LED_CONTROL_SHORT_LAST_ADDR - SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_PAGE_LENGTH 0x48
|
||||
|
||||
// LED Control Registers
|
||||
#define SNLED27351_LED_PWM_FIRST_ADDR 0x00
|
||||
#define SNLED27351_LED_PWM_LAST_ADDR 0xBF
|
||||
#define SNLED27351_LED_PWM_LENGTH 0xC0
|
||||
|
||||
// Current Tune Registers
|
||||
#define SNLED27351_LED_CURRENT_TUNE_FIRST_ADDR 0x00
|
||||
#define SNLED27351_LED_CURRENT_TUNE_LAST_ADDR 0x0B
|
||||
#define SNLED27351_LED_CURRENT_TUNE_LENGTH 0x0C
|
||||
|
||||
#define A_1 0x00
|
||||
#define A_2 0x01
|
||||
#define A_3 0x02
|
||||
|
|
|
@ -29,7 +29,7 @@
|
|||
#endif
|
||||
|
||||
#ifndef SNLED27351_PHASE_CHANNEL
|
||||
# define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_12CHANNEL
|
||||
# define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_12_CHANNEL
|
||||
#endif
|
||||
|
||||
#ifndef SNLED27351_CURRENT_TUNE
|
||||
|
@ -133,48 +133,48 @@ void snled27351_init_drivers(void) {
|
|||
|
||||
void snled27351_init(uint8_t addr) {
|
||||
// Select to function page
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
|
||||
// Setting LED driver to shutdown mode
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN);
|
||||
// Setting internal channel pulldown/pullup
|
||||
snled27351_write_register(addr, SNLED27351_REG_PDU, SNLED27351_MSKSET_CA_CB_CHANNEL);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_PULLDOWNUP, SNLED27351_PULLDOWNUP_ALL_ENABLED);
|
||||
// Select number of scan phase
|
||||
snled27351_write_register(addr, SNLED27351_REG_SCAN_PHASE, SNLED27351_PHASE_CHANNEL);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SCAN_PHASE, SNLED27351_PHASE_CHANNEL);
|
||||
// Setting PWM Delay Phase
|
||||
snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE1, SNLED27351_MSKPWM_DELAY_PHASE_ENABLE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_1, SNLED27351_SLEW_RATE_CONTROL_MODE_1_PDP_ENABLE);
|
||||
// Setting Driving/Sinking Channel Slew Rate
|
||||
snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE2, SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_2, SNLED27351_SLEW_RATE_CONTROL_MODE_2_DSL_ENABLE | SNLED27351_SLEW_RATE_CONTROL_MODE_2_SSL_ENABLE);
|
||||
// Setting Iref
|
||||
snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_DISABLE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP, 0);
|
||||
// Set LED CONTROL PAGE (Page 0)
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) {
|
||||
snled27351_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Set PWM PAGE (Page 1)
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_PWM);
|
||||
for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) {
|
||||
snled27351_write_register(addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Set CURRENT PAGE (Page 4)
|
||||
uint8_t current_tune_reg_list[SNLED27351_LED_CURRENT_TUNE_LENGTH] = SNLED27351_CURRENT_TUNE;
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_CURRENT_TUNE_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_CURRENT_TUNE);
|
||||
for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) {
|
||||
snled27351_write_register(addr, i, current_tune_reg_list[i]);
|
||||
}
|
||||
|
||||
// Enable LEDs ON/OFF
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) {
|
||||
snled27351_write_register(addr, i, 0xFF);
|
||||
}
|
||||
|
||||
// Select to function page
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
|
||||
// Setting LED driver to normal mode
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL);
|
||||
}
|
||||
|
||||
void snled27351_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
|
||||
|
@ -230,7 +230,7 @@ void snled27351_set_led_control_register(uint8_t index, bool red, bool green, bo
|
|||
|
||||
void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_PWM);
|
||||
|
||||
// If any of the transactions fail we risk writing dirty PG0,
|
||||
// refresh page 0 just in case.
|
||||
|
@ -243,7 +243,7 @@ void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
|||
|
||||
void snled27351_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
snled27351_write_register(addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
@ -266,16 +266,16 @@ void snled27351_flush(void) {
|
|||
|
||||
void snled27351_sw_return_normal(uint8_t addr) {
|
||||
// Select to function page
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
|
||||
// Setting LED driver to normal mode
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL);
|
||||
}
|
||||
|
||||
void snled27351_sw_shutdown(uint8_t addr) {
|
||||
// Select to function page
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE);
|
||||
snled27351_write_register(addr, SNLED27351_REG_COMMAND, SNLED27351_COMMAND_FUNCTION);
|
||||
// Setting LED driver to shutdown mode
|
||||
snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN, SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN);
|
||||
// Write SW Sleep Register
|
||||
snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_ENABLE);
|
||||
snled27351_write_register(addr, SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP, SNLED27351_SOFTWARE_SLEEP_ENABLE);
|
||||
}
|
||||
|
|
|
@ -47,23 +47,98 @@
|
|||
# define SNLED27351_CURRENT_TUNE CKLED2001_CURRENT_TUNE
|
||||
#endif
|
||||
|
||||
#define MSKPHASE_12CHANNEL SNLED27351_MSKPHASE_12CHANNEL
|
||||
#define MSKPHASE_11CHANNEL SNLED27351_MSKPHASE_11CHANNEL
|
||||
#define MSKPHASE_10CHANNEL SNLED27351_MSKPHASE_10CHANNEL
|
||||
#define MSKPHASE_9CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define MSKPHASE_8CHANNEL SNLED27351_MSKPHASE_8CHANNEL
|
||||
#define MSKPHASE_7CHANNEL SNLED27351_MSKPHASE_7CHANNEL
|
||||
#define MSKPHASE_6CHANNEL SNLED27351_MSKPHASE_6CHANNEL
|
||||
#define MSKPHASE_5CHANNEL SNLED27351_MSKPHASE_5CHANNEL
|
||||
#define MSKPHASE_4CHANNEL SNLED27351_MSKPHASE_4CHANNEL
|
||||
#define MSKPHASE_3CHANNEL SNLED27351_MSKPHASE_3CHANNEL
|
||||
#define MSKPHASE_2CHANNEL SNLED27351_MSKPHASE_2CHANNEL
|
||||
#define MSKPHASE_1CHANNEL SNLED27351_MSKPHASE_1CHANNEL
|
||||
#define MSKPHASE_12CHANNEL SNLED27351_SCAN_PHASE_12_CHANNEL
|
||||
#define MSKPHASE_11CHANNEL SNLED27351_SCAN_PHASE_11_CHANNEL
|
||||
#define MSKPHASE_10CHANNEL SNLED27351_SCAN_PHASE_10_CHANNEL
|
||||
#define MSKPHASE_9CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
#define MSKPHASE_8CHANNEL SNLED27351_SCAN_PHASE_8_CHANNEL
|
||||
#define MSKPHASE_7CHANNEL SNLED27351_SCAN_PHASE_7_CHANNEL
|
||||
#define MSKPHASE_6CHANNEL SNLED27351_SCAN_PHASE_6_CHANNEL
|
||||
#define MSKPHASE_5CHANNEL SNLED27351_SCAN_PHASE_5_CHANNEL
|
||||
#define MSKPHASE_4CHANNEL SNLED27351_SCAN_PHASE_4_CHANNEL
|
||||
#define MSKPHASE_3CHANNEL SNLED27351_SCAN_PHASE_3_CHANNEL
|
||||
#define MSKPHASE_2CHANNEL SNLED27351_SCAN_PHASE_2_CHANNEL
|
||||
#define MSKPHASE_1CHANNEL SNLED27351_SCAN_PHASE_1_CHANNEL
|
||||
|
||||
#define ckled2001_led snled27351_led_t
|
||||
#define g_ckled2001_leds g_snled27351_leds
|
||||
// ========
|
||||
|
||||
#define SNLED27351_REG_COMMAND 0xFD
|
||||
#define SNLED27351_COMMAND_LED_CONTROL 0x00
|
||||
#define SNLED27351_COMMAND_PWM 0x01
|
||||
#define SNLED27351_COMMAND_FUNCTION 0x03
|
||||
#define SNLED27351_COMMAND_CURRENT_TUNE 0x04
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_SOFTWARE_SHUTDOWN 0x00
|
||||
#define SNLED27351_SOFTWARE_SHUTDOWN_SSD_SHUTDOWN (0x0 << 0)
|
||||
#define SNLED27351_SOFTWARE_SHUTDOWN_SSD_NORMAL (0x1 << 0)
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_ID 0x11
|
||||
#define SNLED27351_DRIVER_ID 0x8A
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_PULLDOWNUP 0x13
|
||||
#define SNLED27351_PULLDOWNUP_ALL_ENABLED 0xAA
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_SCAN_PHASE 0x14
|
||||
#define SNLED27351_SCAN_PHASE_12_CHANNEL 0x00
|
||||
#define SNLED27351_SCAN_PHASE_11_CHANNEL 0x01
|
||||
#define SNLED27351_SCAN_PHASE_10_CHANNEL 0x02
|
||||
#define SNLED27351_SCAN_PHASE_9_CHANNEL 0x03
|
||||
#define SNLED27351_SCAN_PHASE_8_CHANNEL 0x04
|
||||
#define SNLED27351_SCAN_PHASE_7_CHANNEL 0x05
|
||||
#define SNLED27351_SCAN_PHASE_6_CHANNEL 0x06
|
||||
#define SNLED27351_SCAN_PHASE_5_CHANNEL 0x07
|
||||
#define SNLED27351_SCAN_PHASE_4_CHANNEL 0x08
|
||||
#define SNLED27351_SCAN_PHASE_3_CHANNEL 0x09
|
||||
#define SNLED27351_SCAN_PHASE_2_CHANNEL 0x0A
|
||||
#define SNLED27351_SCAN_PHASE_1_CHANNEL 0x0B
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_1 0x15
|
||||
#define SNLED27351_SLEW_RATE_CONTROL_MODE_1_PDP_ENABLE (0b1 << 2)
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_SLEW_RATE_CONTROL_MODE_2 0x16
|
||||
#define SNLED27351_SLEW_RATE_CONTROL_MODE_2_SSL_ENABLE (0b1 << 6)
|
||||
#define SNLED27351_SLEW_RATE_CONTROL_MODE_2_DSL_ENABLE (0b1 << 7)
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_OPEN_SHORT_ENABLE 0x17
|
||||
#define SNLED27351_OPEN_SHORT_ENABLE_SDS_ENABLE (0b1 << 6)
|
||||
#define SNLED27351_OPEN_SHORT_ENABLE_ODS_ENABLE (0b1 << 7)
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_OPEN_SHORT_DUTY 0x18
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_OPEN_SHORT_FLAG 0x19
|
||||
#define SNLED27351_OPEN_SHORT_FLAG_OSINT_ENABLE (0b1 << 6)
|
||||
#define SNLED27351_OPEN_SHORT_FLAG_ODINT_ENABLE (0b1 << 7)
|
||||
|
||||
#define SNLED27351_FUNCTION_REG_SOFTWARE_SLEEP 0x1A
|
||||
#define SNLED27351_SOFTWARE_SLEEP_ENABLE (0b1 << 1)
|
||||
|
||||
// LED Control Registers
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR 0x17
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_LENGTH ((SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR - SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR 0x18
|
||||
#define SNLED27351_LED_CONTROL_OPEN_LAST_ADDR 0x2F
|
||||
#define SNLED27351_LED_CONTROL_OPEN_LENGTH ((SNLED27351_LED_CONTROL_OPEN_LAST_ADDR - SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR 0x30
|
||||
#define SNLED27351_LED_CONTROL_SHORT_LAST_ADDR 0x47
|
||||
#define SNLED27351_LED_CONTROL_SHORT_LENGTH ((SNLED27351_LED_CONTROL_SHORT_LAST_ADDR - SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_PAGE_LENGTH 0x48
|
||||
|
||||
// LED Control Registers
|
||||
#define SNLED27351_LED_PWM_FIRST_ADDR 0x00
|
||||
#define SNLED27351_LED_PWM_LAST_ADDR 0xBF
|
||||
#define SNLED27351_LED_PWM_LENGTH 0xC0
|
||||
|
||||
// Current Tune Registers
|
||||
#define SNLED27351_LED_CURRENT_TUNE_FIRST_ADDR 0x00
|
||||
#define SNLED27351_LED_CURRENT_TUNE_LAST_ADDR 0x0B
|
||||
#define SNLED27351_LED_CURRENT_TUNE_LENGTH 0x0C
|
||||
|
||||
#define SNLED27351_I2C_ADDRESS_GND 0x74
|
||||
#define SNLED27351_I2C_ADDRESS_SCL 0x75
|
||||
#define SNLED27351_I2C_ADDRESS_SDA 0x76
|
||||
|
@ -114,92 +189,6 @@ void snled27351_flush(void);
|
|||
void snled27351_sw_return_normal(uint8_t addr);
|
||||
void snled27351_sw_shutdown(uint8_t addr);
|
||||
|
||||
// Registers Page Define
|
||||
#define SNLED27351_REG_CONFIGURE_CMD_PAGE 0xFD
|
||||
#define SNLED27351_LED_CONTROL_PAGE 0x00
|
||||
#define SNLED27351_LED_PWM_PAGE 0x01
|
||||
#define SNLED27351_FUNCTION_PAGE 0x03
|
||||
#define SNLED27351_CURRENT_TUNE_PAGE 0x04
|
||||
|
||||
// Function Register: address 0x00
|
||||
#define SNLED27351_REG_CONFIGURATION 0x00
|
||||
#define SNLED27351_MSKSW_SHUT_DOWN_MODE (0x0 << 0)
|
||||
#define SNLED27351_MSKSW_NORMAL_MODE (0x1 << 0)
|
||||
|
||||
#define SNLED27351_REG_DRIVER_ID 0x11
|
||||
#define SNLED27351_DRIVER_ID 0x8A
|
||||
|
||||
#define SNLED27351_REG_PDU 0x13
|
||||
#define SNLED27351_MSKSET_CA_CB_CHANNEL 0xAA
|
||||
#define SNLED27351_MSKCLR_CA_CB_CHANNEL 0x00
|
||||
|
||||
#define SNLED27351_REG_SCAN_PHASE 0x14
|
||||
#define SNLED27351_MSKPHASE_12CHANNEL 0x00
|
||||
#define SNLED27351_MSKPHASE_11CHANNEL 0x01
|
||||
#define SNLED27351_MSKPHASE_10CHANNEL 0x02
|
||||
#define SNLED27351_MSKPHASE_9CHANNEL 0x03
|
||||
#define SNLED27351_MSKPHASE_8CHANNEL 0x04
|
||||
#define SNLED27351_MSKPHASE_7CHANNEL 0x05
|
||||
#define SNLED27351_MSKPHASE_6CHANNEL 0x06
|
||||
#define SNLED27351_MSKPHASE_5CHANNEL 0x07
|
||||
#define SNLED27351_MSKPHASE_4CHANNEL 0x08
|
||||
#define SNLED27351_MSKPHASE_3CHANNEL 0x09
|
||||
#define SNLED27351_MSKPHASE_2CHANNEL 0x0A
|
||||
#define SNLED27351_MSKPHASE_1CHANNEL 0x0B
|
||||
|
||||
#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE1 0x15
|
||||
#define SNLED27351_MSKPWM_DELAY_PHASE_ENABLE 0x04
|
||||
#define SNLED27351_MSKPWM_DELAY_PHASE_DISABLE 0x00
|
||||
|
||||
#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE2 0x16
|
||||
#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE 0xC0
|
||||
#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_DISABLE 0x00
|
||||
|
||||
#define SNLED27351_REG_OPEN_SHORT_ENABLE 0x17
|
||||
#define SNLED27351_MSKOPEN_DETECTION_ENABLE (0x01 << 7)
|
||||
#define SNLED27351_MSKOPEN_DETECTION_DISABLE (0x00)
|
||||
|
||||
#define SNLED27351_MSKSHORT_DETECTION_ENABLE (0x01 << 6)
|
||||
#define SNLED27351_MSKSHORT_DETECTION_DISABLE (0x00)
|
||||
|
||||
#define SNLED27351_REG_OPEN_SHORT_DUTY 0x18
|
||||
#define SNLED27351_REG_OPEN_SHORT_FLAG 0x19
|
||||
|
||||
#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7)
|
||||
#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00)
|
||||
|
||||
#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6)
|
||||
#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00)
|
||||
|
||||
#define SNLED27351_REG_SOFTWARE_SLEEP 0x1A
|
||||
#define SNLED27351_MSKSLEEP_ENABLE 0x02
|
||||
#define SNLED27351_MSKSLEEP_DISABLE 0x00
|
||||
|
||||
// LED Control Registers
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR 0x17
|
||||
#define SNLED27351_LED_CONTROL_ON_OFF_LENGTH ((SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR - SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR 0x18
|
||||
#define SNLED27351_LED_CONTROL_OPEN_LAST_ADDR 0x2F
|
||||
#define SNLED27351_LED_CONTROL_OPEN_LENGTH ((SNLED27351_LED_CONTROL_OPEN_LAST_ADDR - SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR 0x30
|
||||
#define SNLED27351_LED_CONTROL_SHORT_LAST_ADDR 0x47
|
||||
#define SNLED27351_LED_CONTROL_SHORT_LENGTH ((SNLED27351_LED_CONTROL_SHORT_LAST_ADDR - SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR) + 1)
|
||||
|
||||
#define SNLED27351_LED_CONTROL_PAGE_LENGTH 0x48
|
||||
|
||||
// LED Control Registers
|
||||
#define SNLED27351_LED_PWM_FIRST_ADDR 0x00
|
||||
#define SNLED27351_LED_PWM_LAST_ADDR 0xBF
|
||||
#define SNLED27351_LED_PWM_LENGTH 0xC0
|
||||
|
||||
// Current Tune Registers
|
||||
#define SNLED27351_LED_CURRENT_TUNE_FIRST_ADDR 0x00
|
||||
#define SNLED27351_LED_CURRENT_TUNE_LAST_ADDR 0x0B
|
||||
#define SNLED27351_LED_CURRENT_TUNE_LENGTH 0x0C
|
||||
|
||||
#define A_1 0x00
|
||||
#define A_2 0x01
|
||||
#define A_3 0x02
|
||||
|
|
|
@ -20,22 +20,6 @@
|
|||
#include "i2c_master.h"
|
||||
#include "wait.h"
|
||||
|
||||
#define IS31FL3733_COMMANDREGISTER 0xFD
|
||||
#define IS31FL3733_COMMANDREGISTER_WRITELOCK 0xFE
|
||||
#define IS31FL3733_INTERRUPTMASKREGISTER 0xF0
|
||||
#define IS31FL3733_INTERRUPTSTATUSREGISTER 0xF1
|
||||
|
||||
#define IS31FL3733_PAGE_LEDCONTROL 0x00 // PG0
|
||||
#define IS31FL3733_PAGE_PWM 0x01 // PG1
|
||||
#define IS31FL3733_PAGE_AUTOBREATH 0x02 // PG2
|
||||
#define IS31FL3733_PAGE_FUNCTION 0x03 // PG3
|
||||
|
||||
#define IS31FL3733_REG_CONFIGURATION 0x00 // PG3
|
||||
#define IS31FL3733_REG_GLOBALCURRENT 0x01 // PG3
|
||||
#define IS31FL3733_REG_RESET 0x11 // PG3
|
||||
#define IS31FL3733_REG_SW_PULLUP 0x0F // PG3
|
||||
#define IS31FL3733_REG_CS_PULLDOWN 0x10 // PG3
|
||||
|
||||
#define IS31FL3733_PWM_REGISTER_COUNT 192
|
||||
#define IS31FL3733_LED_CONTROL_REGISTER_COUNT 24
|
||||
|
||||
|
@ -59,8 +43,8 @@
|
|||
# define IS31FL3733_CS_PULLDOWN IS31FL3733_PDR_0_OHM
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3733_GLOBALCURRENT
|
||||
# define IS31FL3733_GLOBALCURRENT 0xFF
|
||||
#ifndef IS31FL3733_GLOBAL_CURRENT
|
||||
# define IS31FL3733_GLOBAL_CURRENT 0xFF
|
||||
#endif
|
||||
|
||||
#ifndef IS31FL3733_SYNC_1
|
||||
|
@ -167,20 +151,20 @@ void is31fl3733_init(uint8_t bus, uint8_t addr, uint8_t sync) {
|
|||
// Sync is passed so set it according to the datasheet.
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG0
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL);
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_LED_CONTROL);
|
||||
// Turn off all LEDs.
|
||||
for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(bus, addr, i, 0x00);
|
||||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG1
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM);
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_PWM);
|
||||
// Set PWM on all LEDs to 0
|
||||
// No need to setup Breath registers to PWM as that is the default.
|
||||
for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) {
|
||||
|
@ -188,18 +172,18 @@ void is31fl3733_init(uint8_t bus, uint8_t addr, uint8_t sync) {
|
|||
}
|
||||
|
||||
// Unlock the command register.
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
|
||||
// Select PG3
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_FUNCTION);
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_FUNCTION);
|
||||
// Set de-ghost pull-up resistors (SWx)
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_REG_SW_PULLUP, IS31FL3733_SW_PULLUP);
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_FUNCTION_REG_SW_PULLUP, IS31FL3733_SW_PULLUP);
|
||||
// Set de-ghost pull-down resistors (CSx)
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN);
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_FUNCTION_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN);
|
||||
// Set global current to maximum.
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_REG_GLOBALCURRENT, IS31FL3733_GLOBALCURRENT);
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_FUNCTION_REG_GLOBAL_CURRENT, IS31FL3733_GLOBAL_CURRENT);
|
||||
// Disable software shutdown.
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
is31fl3733_write_register(bus, addr, IS31FL3733_FUNCTION_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01);
|
||||
|
||||
// Wait 10ms to ensure the device has woken up.
|
||||
wait_ms(10);
|
||||
|
@ -259,8 +243,8 @@ void is31fl3733_set_led_control_register(uint8_t index, bool red, bool green, bo
|
|||
void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
||||
if (g_pwm_buffer_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG1.
|
||||
is31fl3733_write_register(index, addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(index, addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM);
|
||||
is31fl3733_write_register(index, addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3733_write_register(index, addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_PWM);
|
||||
|
||||
// If any of the transactions fail we risk writing dirty PG0,
|
||||
// refresh page 0 just in case.
|
||||
|
@ -274,8 +258,8 @@ void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
|
|||
void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) {
|
||||
if (g_led_control_registers_update_required[index]) {
|
||||
// Firstly we need to unlock the command register and select PG0
|
||||
is31fl3733_write_register(index, addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5);
|
||||
is31fl3733_write_register(index, addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL);
|
||||
is31fl3733_write_register(index, addr, IS31FL3733_REG_COMMAND_WRITE_LOCK, IS31FL3733_COMMAND_WRITE_LOCK_MAGIC);
|
||||
is31fl3733_write_register(index, addr, IS31FL3733_REG_COMMAND, IS31FL3733_COMMAND_LED_CONTROL);
|
||||
for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) {
|
||||
is31fl3733_write_register(index, addr, i, g_led_control_registers[index][i]);
|
||||
}
|
||||
|
|
|
@ -22,6 +22,25 @@
|
|||
#include <stdbool.h>
|
||||
#include "progmem.h"
|
||||
|
||||
#define IS31FL3733_REG_INTERRUPT_MASK 0xF0
|
||||
#define IS31FL3733_REG_INTERRUPT_STATUS 0xF1
|
||||
|
||||
#define IS31FL3733_REG_COMMAND 0xFD
|
||||
|
||||
#define IS31FL3733_COMMAND_LED_CONTROL 0x00
|
||||
#define IS31FL3733_COMMAND_PWM 0x01
|
||||
#define IS31FL3733_COMMAND_AUTO_BREATH 0x02
|
||||
#define IS31FL3733_COMMAND_FUNCTION 0x03
|
||||
|
||||
#define IS31FL3733_FUNCTION_REG_CONFIGURATION 0x00
|
||||
#define IS31FL3733_FUNCTION_REG_GLOBAL_CURRENT 0x01
|
||||
#define IS31FL3733_FUNCTION_REG_SW_PULLUP 0x0F
|
||||
#define IS31FL3733_FUNCTION_REG_CS_PULLDOWN 0x10
|
||||
#define IS31FL3733_FUNCTION_REG_RESET 0x11
|
||||
|
||||
#define IS31FL3733_REG_COMMAND_WRITE_LOCK 0xFE
|
||||
#define IS31FL3733_COMMAND_WRITE_LOCK_MAGIC 0xC5
|
||||
|
||||
#define IS31FL3733_I2C_ADDRESS_GND_GND 0x50
|
||||
#define IS31FL3733_I2C_ADDRESS_GND_SCL 0x51
|
||||
#define IS31FL3733_I2C_ADDRESS_GND_SDA 0x52
|
||||
|
|
|
@ -29,7 +29,7 @@
|
|||
#define DRIVER_2_LED_TOTAL 39
|
||||
#define RGB_MATRIX_LED_COUNT (DRIVER_1_LED_TOTAL + DRIVER_2_LED_TOTAL)
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
/* Set led driver current */
|
||||
#define SNLED27351_CURRENT_TUNE \
|
||||
{ 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44 }
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
/* LED Matrix Configuration */
|
||||
#define LED_MATRIX_LED_COUNT 90
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
/* Set led driver current */
|
||||
#define SNLED27351_CURRENT_TUNE \
|
||||
{ 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44, 0x9D, 0x9D, 0x44 }
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
/* RGB Matrix Configuration */
|
||||
#define RGB_MATRIX_LED_COUNT 26
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
|
||||
/* Encoder Configuration*/
|
||||
#define ENCODER_DEFAULT_POS 0x3
|
||||
|
|
|
@ -41,7 +41,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
#define SNLED27351_CURRENT_TUNE \
|
||||
{ 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A }
|
||||
|
||||
|
|
|
@ -44,7 +44,7 @@
|
|||
#define WEAR_LEVELING_LOGICAL_SIZE 2048
|
||||
#define WEAR_LEVELING_BACKING_SIZE (WEAR_LEVELING_LOGICAL_SIZE * 2)
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
/* Set LED driver current */
|
||||
#define SNLED27351_CURRENT_TUNE \
|
||||
{ 0xA6, 0xA6, 0x50, 0xA6, 0xA6, 0x50, 0xA6, 0xA6, 0x50, 0xA6, 0xA6, 0x50 }
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
#define SNLED27351_I2C_ADDRESS_1 SNLED27351_I2C_ADDRESS_VDDIO
|
||||
#define SNLED27351_I2C_ADDRESS_2 SNLED27351_I2C_ADDRESS_GND
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
|
||||
/* Disable DIP switch in matrix data */
|
||||
#define MATRIX_MASKED
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
|
||||
/* DIP switch */
|
||||
#define DIP_SWITCH_MATRIX_GRID { {5, 4} }
|
||||
|
|
|
@ -24,5 +24,4 @@
|
|||
/* RGB Matrix Configuration */
|
||||
#define RGB_MATRIX_LED_COUNT 61
|
||||
|
||||
/* Scan phase of led driver set as SNLED27351_MSKPHASE_9CHANNEL(defined as 0x03 in SNLED27351.h) */
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
|
|
|
@ -37,7 +37,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 30U
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
#define SNLED27351_CURRENT_TUNE \
|
||||
{ 0xB8, 0xB8, 0x58, 0xB8, 0xB8, 0x58, 0xB8, 0xB8, 0x58, 0xB8, 0xB8, 0x58 }
|
||||
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
#define SNLED27351_CURRENT_TUNE \
|
||||
{ 0xF8, 0xF8, 0x80, 0xF8, 0xF8, 0x80, 0xF8, 0xF8, 0x80, 0xF8, 0xF8, 0x80 }
|
||||
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
#define SNLED27351_CURRENT_TUNE \
|
||||
{ 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60 }
|
||||
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#define DRIVER_2_LED_TOTAL 38
|
||||
#define RGB_MATRIX_LED_COUNT (DRIVER_1_LED_TOTAL + DRIVER_2_LED_TOTAL)
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
#define SNLED27351_CURRENT_TUNE \
|
||||
{ 0xA0, 0xA0, 0x48, 0xA0, 0xA0, 0x48, 0xA0, 0xA0, 0x48, 0xA0, 0xA0, 0x48 }
|
||||
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
#define DRIVER_1_LED_TOTAL 84
|
||||
#define LED_MATRIX_LED_COUNT DRIVER_1_LED_TOTAL
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_6CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_6_CHANNEL
|
||||
#define SNLED27351_CURRENT_TUNE \
|
||||
{ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80 } // 250mA
|
||||
// { 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 } // 127mA
|
||||
|
|
|
@ -43,7 +43,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
|
||||
/* turn off effects when suspended */
|
||||
#define RGB_DISABLE_WHEN_USB_SUSPENDED
|
||||
|
|
|
@ -42,7 +42,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
#define SNLED27351_CURRENT_TUNE { 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A, 0x98, 0x98, 0x4A }
|
||||
|
||||
/* DIP switch */
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
|
||||
/* Disable DIP switch in matrix data */
|
||||
#define MATRIX_MASKED
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
|
||||
/* DIP switch */
|
||||
#define DIP_SWITCH_MATRIX_GRID { {5, 4} }
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
#define SNLED27351_CURRENT_TUNE { 0xFC, 0xFC, 0x70, 0xFC, 0xFC, 0x70, 0xFC, 0xFC, 0x70, 0xFC, 0xFC, 0x70 }
|
||||
|
||||
/* DIP switch */
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
#define I2C1_TIMINGR_SCLH 15U
|
||||
#define I2C1_TIMINGR_SCLL 51U
|
||||
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_9CHANNEL
|
||||
#define SNLED27351_PHASE_CHANNEL SNLED27351_SCAN_PHASE_9_CHANNEL
|
||||
#define SNLED27351_CURRENT_TUNE { 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60, 0xC4, 0xC4, 0x60 }
|
||||
|
||||
/* DIP switch */
|
||||
|
|
Loading…
Reference in a new issue