138 lines
2.9 KiB
C
138 lines
2.9 KiB
C
/* Copyright 2021 QMK
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "bootloader.h"
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#include <avr/interrupt.h>
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#include <avr/wdt.h>
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#include <util/delay.h>
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__attribute__((weak)) void bootloader_jump(void) {
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// http://www.pjrc.com/teensy/jump_to_bootloader.html
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cli();
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// disable watchdog, if enabled (it's not)
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// disable all peripherals
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// a shutdown call might make sense here
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UDCON = 1;
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USBCON = (1 << FRZCLK); // disable USB
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UCSR1B = 0;
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_delay_ms(5);
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#if defined(__AVR_AT90USB162__) // Teensy 1.0
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EIMSK = 0;
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PCICR = 0;
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SPCR = 0;
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ACSR = 0;
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EECR = 0;
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TIMSK0 = 0;
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TIMSK1 = 0;
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UCSR1B = 0;
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DDRB = 0;
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DDRC = 0;
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DDRD = 0;
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PORTB = 0;
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PORTC = 0;
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PORTD = 0;
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asm volatile("jmp 0x3E00");
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#elif defined(__AVR_ATmega32U4__) // Teensy 2.0
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EIMSK = 0;
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PCICR = 0;
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SPCR = 0;
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ACSR = 0;
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EECR = 0;
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ADCSRA = 0;
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TIMSK0 = 0;
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TIMSK1 = 0;
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TIMSK3 = 0;
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TIMSK4 = 0;
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UCSR1B = 0;
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TWCR = 0;
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DDRB = 0;
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DDRC = 0;
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DDRD = 0;
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DDRE = 0;
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DDRF = 0;
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TWCR = 0;
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PORTB = 0;
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PORTC = 0;
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PORTD = 0;
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PORTE = 0;
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PORTF = 0;
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asm volatile("jmp 0x7E00");
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#elif defined(__AVR_AT90USB646__) // Teensy++ 1.0
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EIMSK = 0;
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PCICR = 0;
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SPCR = 0;
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ACSR = 0;
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EECR = 0;
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ADCSRA = 0;
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TIMSK0 = 0;
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TIMSK1 = 0;
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TIMSK2 = 0;
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TIMSK3 = 0;
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UCSR1B = 0;
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TWCR = 0;
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DDRA = 0;
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DDRB = 0;
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DDRC = 0;
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DDRD = 0;
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DDRE = 0;
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DDRF = 0;
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PORTA = 0;
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PORTB = 0;
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PORTC = 0;
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PORTD = 0;
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PORTE = 0;
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PORTF = 0;
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asm volatile("jmp 0xFC00");
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#elif defined(__AVR_AT90USB1286__) // Teensy++ 2.0
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EIMSK = 0;
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PCICR = 0;
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SPCR = 0;
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ACSR = 0;
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EECR = 0;
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ADCSRA = 0;
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TIMSK0 = 0;
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TIMSK1 = 0;
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TIMSK2 = 0;
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TIMSK3 = 0;
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UCSR1B = 0;
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TWCR = 0;
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DDRA = 0;
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DDRB = 0;
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DDRC = 0;
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DDRD = 0;
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DDRE = 0;
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DDRF = 0;
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PORTA = 0;
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PORTB = 0;
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PORTC = 0;
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PORTD = 0;
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PORTE = 0;
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PORTF = 0;
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asm volatile("jmp 0x1FC00");
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#endif
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}
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__attribute__((weak)) void mcu_reset(void) {
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// setup watchdog timeout
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wdt_enable(WDTO_60MS);
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// wait for watchdog timer to trigger
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while (1) {
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}
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}
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