213 lines
6.3 KiB
C
213 lines
6.3 KiB
C
/* Copyright 2021 Colin Lam (Ploopy Corporation)
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* Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com>
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* Copyright 2019 Sunjun Kim
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* Copyright 2019 Hiroyuki Okada
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "adns5050.h"
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#include "wait.h"
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#include "debug.h"
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#include "gpio.h"
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// Registers
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// clang-format off
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#define REG_PRODUCT_ID 0x00
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#define REG_REVISION_ID 0x01
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#define REG_MOTION 0x02
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#define REG_DELTA_X 0x03
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#define REG_DELTA_Y 0x04
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#define REG_SQUAL 0x05
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#define REG_SHUTTER_UPPER 0x06
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#define REG_SHUTTER_LOWER 0x07
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#define REG_MAXIMUM_PIXEL 0x08
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#define REG_PIXEL_SUM 0x09
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#define REG_MINIMUM_PIXEL 0x0a
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#define REG_PIXEL_GRAB 0x0b
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#define REG_MOUSE_CONTROL 0x0d
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#define REG_MOUSE_CONTROL2 0x19
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#define REG_LED_DC_MODE 0x22
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#define REG_CHIP_RESET 0x3a
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#define REG_PRODUCT_ID2 0x3e
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#define REG_INV_REV_ID 0x3f
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#define REG_MOTION_BURST 0x63
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// clang-format on
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void adns5050_init(void) {
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// Initialize the ADNS serial pins.
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gpio_set_pin_output(ADNS5050_SCLK_PIN);
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gpio_set_pin_output(ADNS5050_SDIO_PIN);
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gpio_set_pin_output(ADNS5050_CS_PIN);
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// reboot the adns.
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// if the adns hasn't initialized yet, this is harmless.
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adns5050_write_reg(REG_CHIP_RESET, 0x5a);
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// wait maximum time before adns is ready.
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// this ensures that the adns is actuall ready after reset.
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wait_ms(55);
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// read a burst from the adns and then discard it.
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// gets the adns ready for write commands
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// (for example, setting the dpi).
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adns5050_read_burst();
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}
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// Perform a synchronization with the ADNS.
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// Just as with the serial protocol, this is used by the slave to send a
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// synchronization signal to the master.
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void adns5050_sync(void) {
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gpio_write_pin_low(ADNS5050_CS_PIN);
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wait_us(1);
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gpio_write_pin_high(ADNS5050_CS_PIN);
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}
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void adns5050_cs_select(void) {
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gpio_write_pin_low(ADNS5050_CS_PIN);
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}
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void adns5050_cs_deselect(void) {
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gpio_write_pin_high(ADNS5050_CS_PIN);
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}
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uint8_t adns5050_serial_read(void) {
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gpio_set_pin_input(ADNS5050_SDIO_PIN);
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uint8_t byte = 0;
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for (uint8_t i = 0; i < 8; ++i) {
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gpio_write_pin_low(ADNS5050_SCLK_PIN);
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wait_us(1);
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byte = (byte << 1) | gpio_read_pin(ADNS5050_SDIO_PIN);
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gpio_write_pin_high(ADNS5050_SCLK_PIN);
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wait_us(1);
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}
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return byte;
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}
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void adns5050_serial_write(uint8_t data) {
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gpio_set_pin_output(ADNS5050_SDIO_PIN);
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for (int8_t b = 7; b >= 0; b--) {
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gpio_write_pin_low(ADNS5050_SCLK_PIN);
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if (data & (1 << b))
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gpio_write_pin_high(ADNS5050_SDIO_PIN);
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else
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gpio_write_pin_low(ADNS5050_SDIO_PIN);
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wait_us(2);
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gpio_write_pin_high(ADNS5050_SCLK_PIN);
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}
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// tSWR. See page 15 of the ADNS spec sheet.
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// Technically, this is only necessary if the next operation is an SDIO
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// read. This is not guaranteed to be the case, but we're being lazy.
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wait_us(4);
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// Note that tSWW is never necessary. All write operations require at
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// least 32us, which exceeds tSWW, so there's never a need to wait for it.
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}
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// Read a byte of data from a register on the ADNS.
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// Don't forget to use the register map (as defined in the header file).
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uint8_t adns5050_read_reg(uint8_t reg_addr) {
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adns5050_cs_select();
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adns5050_serial_write(reg_addr);
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// We don't need a minimum tSRAD here. That's because a 4ms wait time is
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// already included in adns5050_serial_write(), so we're good.
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// See page 10 and 15 of the ADNS spec sheet.
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// wait_us(4);
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uint8_t byte = adns5050_serial_read();
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// tSRW & tSRR. See page 15 of the ADNS spec sheet.
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// Technically, this is only necessary if the next operation is an SDIO
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// read or write. This is not guaranteed to be the case.
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// Honestly, this wait could probably be removed.
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wait_us(1);
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adns5050_cs_deselect();
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return byte;
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}
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void adns5050_write_reg(uint8_t reg_addr, uint8_t data) {
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adns5050_cs_select();
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adns5050_serial_write(0b10000000 | reg_addr);
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adns5050_serial_write(data);
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adns5050_cs_deselect();
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}
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report_adns5050_t adns5050_read_burst(void) {
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adns5050_cs_select();
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report_adns5050_t data;
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data.dx = 0;
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data.dy = 0;
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adns5050_serial_write(REG_MOTION_BURST);
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// We don't need a minimum tSRAD here. That's because a 4ms wait time is
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// already included in adns5050_serial_write(), so we're good.
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// See page 10 and 15 of the ADNS spec sheet.
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// wait_us(4);
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uint8_t x = adns5050_serial_read();
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uint8_t y = adns5050_serial_read();
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// Burst mode returns a bunch of other shit that we don't really need.
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// Setting CS to high ends burst mode early.
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adns5050_cs_deselect();
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data.dx = convert_twoscomp(x);
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data.dy = convert_twoscomp(y);
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return data;
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}
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// Convert a two's complement byte from an unsigned data type into a signed
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// data type.
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int8_t convert_twoscomp(uint8_t data) {
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if ((data & 0x80) == 0x80)
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return -128 + (data & 0x7F);
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else
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return data;
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}
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// Don't forget to use the definitions for CPI in the header file.
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void adns5050_set_cpi(uint16_t cpi) {
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uint8_t cpival = constrain((cpi / 125), 0x1, 0xD); // limits to 0--119
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adns5050_write_reg(REG_MOUSE_CONTROL2, 0b10000 | cpival);
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}
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uint16_t adns5050_get_cpi(void) {
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uint8_t cpival = adns5050_read_reg(REG_MOUSE_CONTROL2);
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return (uint16_t)((cpival & 0b10000) * 125);
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}
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bool adns5050_check_signature(void) {
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uint8_t pid = adns5050_read_reg(REG_PRODUCT_ID);
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uint8_t rid = adns5050_read_reg(REG_REVISION_ID);
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uint8_t pid2 = adns5050_read_reg(REG_PRODUCT_ID2);
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return (pid == 0x12 && rid == 0x01 && pid2 == 0x26);
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}
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