321 lines
13 KiB
C
321 lines
13 KiB
C
/* Copyright 2019 Drew Mills
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "quantum.h"
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#include "analog.h"
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#include <ch.h>
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#include <hal.h>
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#if !HAL_USE_ADC
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# error "You need to set HAL_USE_ADC to TRUE in your halconf.h to use the ADC."
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#endif
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#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4
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# error "You need to set one of the 'STM32_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC."
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#endif
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#if STM32_ADC_DUAL_MODE
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# error "STM32 ADC Dual Mode is not supported at this time."
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#endif
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#if STM32_ADCV3_OVERSAMPLING
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# error "STM32 ADCV3 Oversampling is not supported at this time."
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#endif
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// Otherwise assume V3
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#if defined(STM32F0XX) || defined(STM32L0XX)
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# define USE_ADCV1
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#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX)
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# define USE_ADCV2
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#endif
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// BODGE to make v2 look like v1,3 and 4
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#ifdef USE_ADCV2
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# if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_3)
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# define ADC_SMPR_SMP_1P5 ADC_SAMPLE_3
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# define ADC_SMPR_SMP_7P5 ADC_SAMPLE_15
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# define ADC_SMPR_SMP_13P5 ADC_SAMPLE_28
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# define ADC_SMPR_SMP_28P5 ADC_SAMPLE_56
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# define ADC_SMPR_SMP_41P5 ADC_SAMPLE_84
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# define ADC_SMPR_SMP_55P5 ADC_SAMPLE_112
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# define ADC_SMPR_SMP_71P5 ADC_SAMPLE_144
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# define ADC_SMPR_SMP_239P5 ADC_SAMPLE_480
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# endif
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# if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_1P5)
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# define ADC_SMPR_SMP_1P5 ADC_SAMPLE_1P5
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# define ADC_SMPR_SMP_7P5 ADC_SAMPLE_7P5
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# define ADC_SMPR_SMP_13P5 ADC_SAMPLE_13P5
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# define ADC_SMPR_SMP_28P5 ADC_SAMPLE_28P5
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# define ADC_SMPR_SMP_41P5 ADC_SAMPLE_41P5
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# define ADC_SMPR_SMP_55P5 ADC_SAMPLE_55P5
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# define ADC_SMPR_SMP_71P5 ADC_SAMPLE_71P5
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# define ADC_SMPR_SMP_239P5 ADC_SAMPLE_239P5
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# endif
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// we still sample at 12bit, but scale down to the requested bit range
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# define ADC_CFGR1_RES_12BIT 12
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# define ADC_CFGR1_RES_10BIT 10
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# define ADC_CFGR1_RES_8BIT 8
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# define ADC_CFGR1_RES_6BIT 6
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#endif
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/* User configurable ADC options */
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#ifndef ADC_COUNT
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# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX)
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# define ADC_COUNT 1
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# elif defined(STM32F3XX)
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# define ADC_COUNT 4
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# else
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# error "ADC_COUNT has not been set for this ARM microcontroller."
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# endif
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#endif
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#ifndef ADC_NUM_CHANNELS
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# define ADC_NUM_CHANNELS 1
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#elif ADC_NUM_CHANNELS != 1
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# error "The ARM ADC implementation currently only supports reading one channel at a time."
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#endif
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#ifndef ADC_BUFFER_DEPTH
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# define ADC_BUFFER_DEPTH 1
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#endif
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// For more sampling rate options, look at hal_adc_lld.h in ChibiOS
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#ifndef ADC_SAMPLING_RATE
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# define ADC_SAMPLING_RATE ADC_SMPR_SMP_1P5
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#endif
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// Options are 12, 10, 8, and 6 bit.
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#ifndef ADC_RESOLUTION
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# ifdef ADC_CFGR_RES_10BITS // ADCv3, ADCv4
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# define ADC_RESOLUTION ADC_CFGR_RES_10BITS
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# else // ADCv1, ADCv5, or the bodge for ADCv2 above
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# define ADC_RESOLUTION ADC_CFGR1_RES_10BIT
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# endif
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#endif
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static ADCConfig adcCfg = {};
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static adcsample_t sampleBuffer[ADC_NUM_CHANNELS * ADC_BUFFER_DEPTH];
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// Initialize to max number of ADCs, set to empty object to initialize all to false.
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static bool adcInitialized[ADC_COUNT] = {};
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// TODO: add back TR handling???
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static ADCConversionGroup adcConversionGroup = {
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.circular = FALSE,
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.num_channels = (uint16_t)(ADC_NUM_CHANNELS),
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#if defined(USE_ADCV1)
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.cfgr1 = ADC_CFGR1_CONT | ADC_RESOLUTION,
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.smpr = ADC_SAMPLING_RATE,
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#elif defined(USE_ADCV2)
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# if !defined(STM32F1XX)
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.cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without...
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# endif
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.smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE),
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.smpr1 = ADC_SMPR1_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN15(ADC_SAMPLING_RATE),
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#else
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.cfgr = ADC_CFGR_CONT | ADC_RESOLUTION,
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.smpr = {ADC_SMPR1_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN9(ADC_SAMPLING_RATE), ADC_SMPR2_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN15(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN16(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN17(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN18(ADC_SAMPLING_RATE)},
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#endif
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};
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// clang-format off
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__attribute__((weak)) adc_mux pinToMux(pin_t pin) {
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switch (pin) {
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#if defined(STM32F0XX)
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case A0: return TO_MUX( ADC_CHSELR_CHSEL0, 0 );
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case A1: return TO_MUX( ADC_CHSELR_CHSEL1, 0 );
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case A2: return TO_MUX( ADC_CHSELR_CHSEL2, 0 );
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case A3: return TO_MUX( ADC_CHSELR_CHSEL3, 0 );
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case A4: return TO_MUX( ADC_CHSELR_CHSEL4, 0 );
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case A5: return TO_MUX( ADC_CHSELR_CHSEL5, 0 );
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case A6: return TO_MUX( ADC_CHSELR_CHSEL6, 0 );
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case A7: return TO_MUX( ADC_CHSELR_CHSEL7, 0 );
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case B0: return TO_MUX( ADC_CHSELR_CHSEL8, 0 );
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case B1: return TO_MUX( ADC_CHSELR_CHSEL9, 0 );
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case C0: return TO_MUX( ADC_CHSELR_CHSEL10, 0 );
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case C1: return TO_MUX( ADC_CHSELR_CHSEL11, 0 );
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case C2: return TO_MUX( ADC_CHSELR_CHSEL12, 0 );
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case C3: return TO_MUX( ADC_CHSELR_CHSEL13, 0 );
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case C4: return TO_MUX( ADC_CHSELR_CHSEL14, 0 );
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case C5: return TO_MUX( ADC_CHSELR_CHSEL15, 0 );
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#elif defined(STM32F3XX)
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case A0: return TO_MUX( ADC_CHANNEL_IN1, 0 );
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case A1: return TO_MUX( ADC_CHANNEL_IN2, 0 );
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case A2: return TO_MUX( ADC_CHANNEL_IN3, 0 );
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case A3: return TO_MUX( ADC_CHANNEL_IN4, 0 );
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case A4: return TO_MUX( ADC_CHANNEL_IN1, 1 );
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case A5: return TO_MUX( ADC_CHANNEL_IN2, 1 );
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case A6: return TO_MUX( ADC_CHANNEL_IN3, 1 );
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case A7: return TO_MUX( ADC_CHANNEL_IN4, 1 );
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case B0: return TO_MUX( ADC_CHANNEL_IN12, 2 );
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case B1: return TO_MUX( ADC_CHANNEL_IN1, 2 );
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case B2: return TO_MUX( ADC_CHANNEL_IN12, 1 );
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case B12: return TO_MUX( ADC_CHANNEL_IN3, 3 );
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case B13: return TO_MUX( ADC_CHANNEL_IN5, 2 );
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case B14: return TO_MUX( ADC_CHANNEL_IN4, 3 );
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case B15: return TO_MUX( ADC_CHANNEL_IN5, 3 );
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case C0: return TO_MUX( ADC_CHANNEL_IN6, 0 ); // Can also be ADC2
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case C1: return TO_MUX( ADC_CHANNEL_IN7, 0 ); // Can also be ADC2
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case C2: return TO_MUX( ADC_CHANNEL_IN8, 0 ); // Can also be ADC2
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case C3: return TO_MUX( ADC_CHANNEL_IN9, 0 ); // Can also be ADC2
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case C4: return TO_MUX( ADC_CHANNEL_IN5, 1 );
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case C5: return TO_MUX( ADC_CHANNEL_IN11, 1 );
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case D8: return TO_MUX( ADC_CHANNEL_IN12, 3 );
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case D9: return TO_MUX( ADC_CHANNEL_IN13, 3 );
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case D10: return TO_MUX( ADC_CHANNEL_IN7, 2 ); // Can also be ADC4
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case D11: return TO_MUX( ADC_CHANNEL_IN8, 2 ); // Can also be ADC4
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case D12: return TO_MUX( ADC_CHANNEL_IN9, 2 ); // Can also be ADC4
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case D13: return TO_MUX( ADC_CHANNEL_IN10, 2 ); // Can also be ADC4
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case D14: return TO_MUX( ADC_CHANNEL_IN11, 2 ); // Can also be ADC4
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case E7: return TO_MUX( ADC_CHANNEL_IN13, 2 );
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case E8: return TO_MUX( ADC_CHANNEL_IN6, 2 ); // Can also be ADC4
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case E9: return TO_MUX( ADC_CHANNEL_IN2, 2 );
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case E10: return TO_MUX( ADC_CHANNEL_IN14, 2 );
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case E11: return TO_MUX( ADC_CHANNEL_IN15, 2 );
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case E12: return TO_MUX( ADC_CHANNEL_IN16, 2 );
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case E13: return TO_MUX( ADC_CHANNEL_IN3, 2 );
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case E14: return TO_MUX( ADC_CHANNEL_IN1, 3 );
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case E15: return TO_MUX( ADC_CHANNEL_IN2, 3 );
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case F2: return TO_MUX( ADC_CHANNEL_IN10, 0 ); // Can also be ADC2
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case F4: return TO_MUX( ADC_CHANNEL_IN5, 0 );
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#elif defined(STM32F4XX)
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case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
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case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 );
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case A2: return TO_MUX( ADC_CHANNEL_IN2, 0 );
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case A3: return TO_MUX( ADC_CHANNEL_IN3, 0 );
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case A4: return TO_MUX( ADC_CHANNEL_IN4, 0 );
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case A5: return TO_MUX( ADC_CHANNEL_IN5, 0 );
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case A6: return TO_MUX( ADC_CHANNEL_IN6, 0 );
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case A7: return TO_MUX( ADC_CHANNEL_IN7, 0 );
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case B0: return TO_MUX( ADC_CHANNEL_IN8, 0 );
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case B1: return TO_MUX( ADC_CHANNEL_IN9, 0 );
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case C0: return TO_MUX( ADC_CHANNEL_IN10, 0 );
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case C1: return TO_MUX( ADC_CHANNEL_IN11, 0 );
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case C2: return TO_MUX( ADC_CHANNEL_IN12, 0 );
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case C3: return TO_MUX( ADC_CHANNEL_IN13, 0 );
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case C4: return TO_MUX( ADC_CHANNEL_IN14, 0 );
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case C5: return TO_MUX( ADC_CHANNEL_IN15, 0 );
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# if STM32_ADC_USE_ADC3
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case F3: return TO_MUX( ADC_CHANNEL_IN9, 2 );
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case F4: return TO_MUX( ADC_CHANNEL_IN14, 2 );
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case F5: return TO_MUX( ADC_CHANNEL_IN15, 2 );
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case F6: return TO_MUX( ADC_CHANNEL_IN4, 2 );
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case F7: return TO_MUX( ADC_CHANNEL_IN5, 2 );
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case F8: return TO_MUX( ADC_CHANNEL_IN6, 2 );
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case F9: return TO_MUX( ADC_CHANNEL_IN7, 2 );
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case F10: return TO_MUX( ADC_CHANNEL_IN8, 2 );
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# endif
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#elif defined(STM32F1XX)
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case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
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case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 );
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case A2: return TO_MUX( ADC_CHANNEL_IN2, 0 );
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case A3: return TO_MUX( ADC_CHANNEL_IN3, 0 );
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case A4: return TO_MUX( ADC_CHANNEL_IN4, 0 );
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case A5: return TO_MUX( ADC_CHANNEL_IN5, 0 );
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case A6: return TO_MUX( ADC_CHANNEL_IN6, 0 );
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case A7: return TO_MUX( ADC_CHANNEL_IN7, 0 );
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case B0: return TO_MUX( ADC_CHANNEL_IN8, 0 );
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case B1: return TO_MUX( ADC_CHANNEL_IN9, 0 );
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case C0: return TO_MUX( ADC_CHANNEL_IN10, 0 );
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case C1: return TO_MUX( ADC_CHANNEL_IN11, 0 );
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case C2: return TO_MUX( ADC_CHANNEL_IN12, 0 );
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case C3: return TO_MUX( ADC_CHANNEL_IN13, 0 );
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case C4: return TO_MUX( ADC_CHANNEL_IN14, 0 );
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case C5: return TO_MUX( ADC_CHANNEL_IN15, 0 );
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// STM32F103x[C-G] in 144-pin packages also have analog inputs on F6...F10, but they are on ADC3, and the
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// ChibiOS ADC driver for STM32F1xx currently supports only ADC1, therefore these pins are not usable.
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#endif
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}
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// return an adc that would never be used so intToADCDriver will bail out
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return TO_MUX(0, 0xFF);
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}
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// clang-format on
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static inline ADCDriver* intToADCDriver(uint8_t adcInt) {
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switch (adcInt) {
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#if STM32_ADC_USE_ADC1
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case 0:
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return &ADCD1;
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#endif
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#if STM32_ADC_USE_ADC2
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case 1:
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return &ADCD2;
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#endif
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#if STM32_ADC_USE_ADC3
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case 2:
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return &ADCD3;
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#endif
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#if STM32_ADC_USE_ADC4
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case 3:
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return &ADCD4;
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#endif
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}
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return NULL;
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}
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static inline void manageAdcInitializationDriver(uint8_t adc, ADCDriver* adcDriver) {
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if (!adcInitialized[adc]) {
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adcStart(adcDriver, &adcCfg);
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adcInitialized[adc] = true;
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}
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}
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int16_t analogReadPin(pin_t pin) {
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palSetLineMode(pin, PAL_MODE_INPUT_ANALOG);
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return adc_read(pinToMux(pin));
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}
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int16_t analogReadPinAdc(pin_t pin, uint8_t adc) {
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palSetLineMode(pin, PAL_MODE_INPUT_ANALOG);
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adc_mux target = pinToMux(pin);
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target.adc = adc;
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return adc_read(target);
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}
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int16_t adc_read(adc_mux mux) {
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#if defined(USE_ADCV1)
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// TODO: fix previous assumption of only 1 input...
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adcConversionGroup.chselr = 1 << mux.input; /*no macro to convert N to ADC_CHSELR_CHSEL1*/
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#elif defined(USE_ADCV2)
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adcConversionGroup.sqr3 = ADC_SQR3_SQ1_N(mux.input);
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#else
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adcConversionGroup.sqr[0] = ADC_SQR1_SQ1_N(mux.input);
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#endif
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ADCDriver* targetDriver = intToADCDriver(mux.adc);
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if (!targetDriver) {
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return 0;
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}
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manageAdcInitializationDriver(mux.adc, targetDriver);
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if (adcConvert(targetDriver, &adcConversionGroup, &sampleBuffer[0], ADC_BUFFER_DEPTH) != MSG_OK) {
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return 0;
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}
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#ifdef USE_ADCV2
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// fake 12-bit -> N-bit scale
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return (*sampleBuffer) >> (12 - ADC_RESOLUTION);
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#else
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// already handled as part of adcConvert
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return *sampleBuffer;
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#endif
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}
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