mirror of https://github.com/OpenTTD/OpenTTD.git
Add: use of Intel Intrinsics & RDTSC on e2k (MCST Elbrus 2000) (#9575)
MCST e2k (Elbrus 2000) architecture has half native / half software support of most Intel/AMD SIMD e.g. MMX/SSE/SSE2/SSE3/SSSE3/SSE4.1/SSE4.2/AES/AVX/AVX2 & 3DNow!/SSE4a/XOP/FMA4 E2K - this is VLIW/EPIC architecture, like Intel Itanium (IA-64) architecture. Ref: https://en.wikipedia.org/wiki/Elbrus_2000 Co-authored-by: Alexander Troosh @troosh, Konstantin Ivlev @sse4 and Dmitry Shcherbakov @crypto-das
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src/cpu.cpp
30
src/cpu.cpp
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@ -73,6 +73,18 @@ uint64 ottd_rdtsc()
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# define RDTSC_AVAILABLE
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#endif
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/* rdtsc for MCST Elbrus 2000 */
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#if defined(__e2k__) && !defined(RDTSC_AVAILABLE)
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uint64 ottd_rdtsc()
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{
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uint64_t dst;
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# pragma asm_inline
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asm("rrd %%clkr, %0" : "=r" (dst));
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return dst;
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}
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# define RDTSC_AVAILABLE
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#endif
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#if defined(__EMSCRIPTEN__) && !defined(RDTSC_AVAILABLE)
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/* On emscripten doing TIC/TOC would be ill-advised */
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uint64 ottd_rdtsc() {return 0;}
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@ -131,6 +143,24 @@ void ottd_cpuid(int info[4], int type)
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);
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#endif /* i386 PIC */
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}
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#elif defined(__e2k__) /* MCST Elbrus 2000*/
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void ottd_cpuid(int info[4], int type)
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{
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info[0] = info[1] = info[2] = info[3] = 0;
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if (type == 0) {
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info[0] = 1;
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} else if (type == 1) {
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#if defined(__SSE4_1__)
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info[2] |= (1<<19); /* HasCPUIDFlag(1, 2, 19) */
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#endif
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#if defined(__SSSE3__)
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info[2] |= (1<<9); /* HasCPUIDFlag(1, 2, 9) */
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#endif
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#if defined(__SSE2__)
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info[3] |= (1<<26); /* HasCPUIDFlag(1, 3, 26) */
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#endif
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}
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}
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#else
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void ottd_cpuid(int info[4], int type)
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{
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